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LMK04610: sysref and refclk pin assignments

Part Number: LMK04610

Hi Team, 

My customer is using LMK04610 in their application for JESD204B clock creation for their ADC, DAC & FPGA and they would like to know if the the sysref and refclk for the same part need to be from the adjacent clkout pairs?

Can you advise accordingly? 

Thanks in advance. 

Obinna. 

  • Hi Obinna,

    LMK04610 does not require REFCLK and SYSREF to come from adjacent clock outputs on six of the output channels - channels 1, 2, 5, 6, 9, and 10 are all independent. However, channel 3/4 share a divider, and channel 7/8 share a divider, so 3/4 must be both REFCLK or SYSREF, and 7/8 must be both REFCLK or SYSREF.

    Regards,