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CDCM6208V1EVM: Are there Linux spi drivers cdcm6208?

Part Number: CDCM6208V1EVM
Other Parts Discussed in Thread: CDCM6208

Looking to use this CDCM6208 part as : 160 MHz in LVDS, All LVDS out, 160 MHz pass thru.to FPGA. Also, 80 MHz  / 100 MHz that drive (2) AFE5832ZBV switching from 12 bit to 10 bit mode.

If there is a Linux driver (for my DM8148 DaVinci) and my desired configuration is obtainable, I will order the EVM. - Patrick

  • Hi Patrick,

    Yes your frequency can be implemented. There's no Linux driver for the EVM, but you can flywire the SPI lines.

    Regards,
    Hao

  • Looking for a Linux driver to forward to software developer for use with my system using this clock generator.

    Patrick

  • Hi Patrick,

    We don't have Linux SPI drivers.

    Typical development flow for these products is:

    1. Configure the desired register settings using TICS Pro software (Windows-based)
    2. Export the register settings from TICS Pro as hexadecimal values in a text file. Text file is printed in register programming order.
    3. Load the hex values to memory somewhere in your host processor, and write to the device using the SPI peripheral

    Historically, we have not provided Linux drivers for our devices, as the use cases have typically been loading a static configuration file and maybe reading a handful of registers or I/O levels to decode status information. However, if this is something that seriously impedes development with our devices, we can look into providing these drivers.

    If you don't mind me asking, what do you (or your software developer) require or expect from the device drivers? For example:

    • Loading initialization sequences?
    • Changing PLL parameters, input buffer properties, or output divider and buffer properties?
    • Reading status registers or I/O state?

    Regards,

  • I have run the EVM software to get a feel for this part.

    Does not seem like I can get this part to achieve my goals:with Input 160 MHz

    Y4 / Y5 = 160 MHz pass thru

    Y0 - Y3 = 100 MHz

    Y6 / Y7 = 80 MHz / 100 MHz switchable.<<< This is where software says not possible. Need for sampling mode change for TI AFE5832ZBV

    If you can get this to work, send me a file to load.

    Patrick

    .

  • Patrick,

    This is actually possible with PS_B set to divide-by-6 (400MHz). Y6 / Y7 divider could be set either to 4 or 5 to achieve 100MHz / 80MHz switchable. Try switching the frequency in Y6 / Y7 boxes between 100MHz and 80MHz in the attached file.

    925443 CDCM6208V1 160 in 160 100 80 out.tcs

    Regards,

  • Thanks Works Great! - Patrick

  • Hi Derek,

    Is it possible to also gate Y0-Y3 100 MHz outputs with an OE PIN?

  • Hi Patrick,

    RESETN pin or SYNCN pin can function as a global OE pin to enable or disable all outputs, but there's no OE pin for specific outputs as far as I'm concerned.

    Regards,
    Hao