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LMX2594: need support on dual loop pll synthesizer logic. and review of block diagram.

KAUSHAL SHARMA1
Prodigy 80 points
Part Number: LMX2594
Other Parts Discussed in Thread: LMK04832, LMX2572LP

Hi 


I am new to RF. I am working on the the RF PLL synthesizer.
I am using HMC7044 (from analog device) for my adc , dac, fpga and rf pll ref input and I want to used LMX2594 with this device for RF PLL LO frequency. so should we need extra pll synthesizer with this or not. If yes, then can we go for dual loop PLL synthesizer for better hooping. Kindly suggest better dual loop pll synthesizer and its reference design.

Also pls review the logic for dual loop pll attached with the clock generator/synthesizer hmc7044. and pls suggest the mixer for the same lmx2594.


pls let me know for any query.

Thanks

Kaushal.

  • 0
    TI__Mastermind 28021 points

    Kaushal,

    HMC7044 looks like a dual loop jitter cleaner for 3.2 GHz output.

    We have a similar part called the LMK04832.

    The LMX2594 is higher performance and higher frequency, but it is much less outputs and also is single loop.

    As for dual loop vs. single loop, dual loop is typically used when the input reference has poor noise performance.  The first PLL cleans this up with the help of an external VCXO and this is used to drive the second PLL.   However, if the input refence is already low noise, then you can just go direct to PLL2.

    Regards,

    Dean 

  • 0 in reply to Dean Banerjee
    Prodigy 80 points

    Hello Dean Banerjee

    Thanks for you reply and the suggested part number. 

    What If i want to improve the lock time. Should I go with the dual pll ?

    regards

    Kaushal Sharma

  • 0 in reply to KAUSHAL SHARMA1
    TI__Mastermind 28021 points

    Kaushai,

    The dual loop will not improve lock time.  If anything, make it worse.  In order to lock, the first PLL needs to lock, then the second one.  Typically the first PLL is set to a fixed frequency that does not change, but the second one is tuned to different frequencies.

    The lock time is mainly governed by the loop bandwidth of the PLL, which is set by external components.  The is also the VCO calibration time, which can also matter if the loop bandwidth is very wide.  In this case, the LMX2594 has some features that improve the VCO calibration time to make it faster than the LMK04832.

    Dean

  • 0 in reply to Dean Banerjee
    Prodigy 80 points

    Dean,
    Thank you so much for your help. Which design (single or double PLL Synthesizer) is better from an FHSS (frequency hopping) perspective?
    Do you have a reference design and/or recommended parts?
    We typical transmit as follows:
    - Below 1400 MHz (even below 920 MHz is doable)
    - Our environment is very noisy
    - Our DACs and ADCs should have at least 16-bit resolution
    - We need to reduce the tuning time of our analog components when we hop frequencies (this is our biggest pain point at the moment).

    Thank you truly.  I look forward to your response.

    regards

    Kaushal

  • 0 in reply to KAUSHAL SHARMA1
    TI__Mastermind 28021 points

    Kaushal,

    I think that single loop typically makes the most sense unless you have a dirty input clock (i.e. like a recovered clock)

    The LMX2594 is a very good synthesizer, but you might want to also consider the LMX2572LP, which is a much lower current and lower cost version that supports the fast frequency calibration.


    Of course, the VCO calibration is only one element of the lock time.  Making a wider loop bandwidth will help with the analog part of the lock time.

    Regards,
    Dean