LMX2594: SYSREF output specification

xiao peng ma

Part Number: LMX2594

What does ϕ stand for?

What is the value of it?

Is there skew between RFoutA and SYSREF ?

7.3.14.2.2 SYSREF Output Format
The SYSREF output comes in differential format through RFoutB. This will have a minimum voltage of about 2.3V and a maximum of 3.3 V. If DC coupling cannot be used, there are two strategies for AC coupling.

1. Send a series of pulses to establish a DC-bias level across the AC-coupling capacitor.
2. Establish a bias voltage at the data converter that is below the threshold voltage by using a resistive divider.

Does these mean that the VOD of the differential format SYSREF signal is 1V(3.3V - 2.3V)?

How can I determine the number of pulses to establish a DC-bias level across the AC-coupling capacitor?

Thank you very much.

over 5 years ago

0 Noel Fung over 5 years ago

TI__Guru** 111890 points

Hi Xiao,

ϕ is a programmable delay.

yes, VOD is approx. 1V when OUTB_PWR = 31 (decimal).

The number of pulses depends on SYSREF frequency, trial-and-error to figure it out when you have a test board.

0 xiao peng ma over 5 years ago in reply to Noel Fung

Intellectual 640 points

Thanks.

So you mean that RFoutA and SYSREF are phase aligned with no phase difference and ϕ can be used to achieve setup and hold timing requirement?

Is the SYSREF frequency higher, the more pulses are needed or the lesser pulses are needed?

0 Noel Fung over 5 years ago in reply to xiao peng ma

TI__Guru** 111890 points

Hi Xiao,

Yes.

Lower frequency requires more pulse.

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LMX2594: SYSREF output specification