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LMK04832: using SYNC in clock distribution modes

xiao peng ma
Intellectual 640 points

Part Number: LMK04832

CLKin1 is clock distribution path and CLKin0 can be the SYNC signal.

Because CLKin0 is re-clocked by CLKin1, two LMK04832 can be synchronized.

What is the setup/hold timing requirement w.r.t CLKin1?

Also I find that SYNC Pin is not re-clocked by any clock, does this mean that two LMK04832 can not be synchronized by SYNC Pin?

Thanks.

  • 0
    TI__Mastermind 34270 points

    Hello Xiao Peng,

    Based on our measurements, setup time w.r.t. CLKin1 is no greater than 156.25ps (one-half of 3200MHz clock cycle) across PVT. We have not tested to smaller resolutions at this time, but it should be clear from this resolution that it is possible to achieve deterministic CLKin0 synchronization to a single, specific CLKin1 clock cycle.

    Datasheet Figure 8 actually has the retiming flip-flop in the wrong position in the SYNC subsystem. Both SYNC pin and CLKin0 are reclocked after the OR gate output of the SYNC_MODE mux. The TICS Pro diagram actually shows the correct position for this retimer:

    Regards,