LMK04828: LMK04828 software driver

Hello Srinivasa,

Have you taken a look at TICSPRO-SW?

We use TICSPRO-SW to configure all our clocking devices. This includes the ability to read back registers.

Thanks,

Vibhu

Hi Vibhu,

Thanks for quick reply. 

I'm not using Evaluation Board to connect USB2ANY to use the TICSPRO-SW.

LMK04828 is mounted on one host board(with LINUX) as spi device.

From Linux console to read the LMK04828 registers, do we have any commands or userspace software?.

using linux spi-config, spi-pipe I'm not getting LMK04828 register values(as spi linux tools are not evolved much).

could you help me to read LMK04828 registers from linux console.

Thanks and Regards

srinivasa

Hello Srinivasa,

So you do not have a microcontroller or FPGA reading back from the device? Any device capable of providing the SPI interface signals to the LMK04828 should be able to readback registers from the LMK04828.

Thanks,

Vibhu

Hi Vibhu,

Thanks for the inputs. through SPI application I could configure the LMK. But I need to generate LMK register file using TICS pro with CLKin1(External VCO) 368.64Mhz.Below is the requirement.

Could you please let me know how to generate the register configuration file for LMK04828B.

1. VCO_MUX to be  selected as CLKin1(External VCO) with 368.64Mhz. 

    if I select VCO_MUX as CLKin1(External VCO) with 368.64Mhz, the input is not taking in the window. it is taking as 491.52Mhz. How to set to 368.64Mhz?.

2. DCLKout10(LMK_CLEAN_CLK) to get 10Mhz. DCLKout8(LMK_SFP_CLK) to be 368.64Mhz. Here also it is taking as 491.52Mhz for DCLKout10. How to set?.

3.If any clock to be generated at output clocks DCLKoutx or SDCLKoutx( i.e for any future requirement).

4. what is the difference between DCLKoutx or SDCLKoutx?.

5. Do we need to set any Analog Delay(ADLY_PD), Digital Delay(DDLY_PD), clock distributing paths, Mux selections after doing above steps for input, output clock selections.

Thanks and Regards

srinivasa

Hi Vibhu,

Thanks for the inputs.

1. The device functional modes should be shown as attached snapshot.

   Dual PLL with CLKin1(External VCO) mode. CLKin1 to be 368.64Mhz.DCLKout8 to be 368.64Mhz. DCLJout10 to be 10Mhz or 122.8Mhz.

2.  But, in TICS Pro in Clock Outputs option, I could not able to set Clkin1(Ext VCO) as 368.64Mhz as shown in snapshot. it is setting to different value(737.28Mhz).

Hello Srinivasa,

So it looks like you intend to use single PLL mode, what is your OSCin frequency? This needs to be set to use this mode correctly. PLL2 output frequency will only be set to frequencies that can  be generated from the Fpd frequency which is dependent on the OSCin.

If this is not the case, do you want to use distribution mode? OSCin is not required but you cannot use an external VCO, instead you have an external clock source and use the LMK04828 as a buffer with dividers.

Thanks,

Vibhu

Hi Vibhu,

Thanks a lot for support.

With the OSCin as 122.88Mhz and prescaller 3, CLKin 368.64Mhz is coming as shown in the snapshot.

Single-loop with external VCO mode  (vs)  Distribution mode. what exactly makes difference?. is it that the VCO corrects the clock in feedback path in the external VCO mode?.

Without the OSCin, just by applying CLKin, in Distribution mode, then what is the LMK functionality, is it  just to clean jitter?.

If the register 0x140 value is x0. will it give any information on modes?.

Hi Vibhu,

Excellent explanation and support.

One more query, I need to drive and generate the clocks for JESD204B RF card, so driving clock at any SDCLKOut given as clk to JESD204B RF card.

Is it that the SYSREF SDCLKout has the current drive capability as compared to DCLKout?.

Thanks and Regards

srinivasa