This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMX2594: IBS of lmx2594

Part Number: LMX2594
Other Parts Discussed in Thread: LMX2820, PLLATINUMSIM-SW

Hi ti experts,

   I have 3 problems of integer boundary spur(IBS) about lmx2594,

1.When i set Fpd=184.32M and Fden=184320,there is a large IBS at 30khz offset with the pll output at 10137.63M. I can understand 30K IBS here.

To avoid this IBS at 10137.63M, i changed Fpd to 221.184M,but there is still a 30khz spur at 10137.63M. I don't know why the spur still exists.

From my understanding,Fvco/Fdp=10137.63/221.84=45.833469 which is not close to an  integer  channel,so there should be no integer boundary spurious.

2.Is there any other methods to avoid IBS?

3.How to distinguish IBS of pll dominated or VCO dominated?

Thanks.

  • Hi,

    For the 30 kHz integer boundary spur, this can be caused as a product between the VCO frequency (Fvco) and phase detector frequency (Fpd).  If this is the dominant cause, then adjusting the phase detector frequency will fix the spur.

    But there is also a mixing product of Fosc and Fvco.  I don't have the exact specifics of your design, but PLLatinum Sim suggests that the mixing product between Fosc and Fvco dominates over the mixing product of Fpd and Fvco.  See picture below.

    For this spur, the main mitigation is to ensure a high slew rate OSCin signal.  If you change the Fosc signal internal to the chip, you can avoid the spur, but this is extra components.   The programmable input multiplier sort of does this, but does not eliminate crosstalk from the input (Fosc) to the VCO.

    Also, for our new LMX2820, we are seeing significant improvements in spurs on the order of 15 dB, although thwe are finializing some of this characterization.

    I also encourage you to try our PLLatinum Sim tool   ti.com/tool/PLLATINUMSIM-SW

    This models spurs and their contributing factors.  Below has your frequencies entered.

    Regards,

    Dean

    Fvco%Fosc

    1.  Fvco%F

  • Hi dean,

    Yes,i have checked this spur by PLLatinum software,it also showing its Fvco%Fpd spur as followings .

  • Sorry,i cannot attach the simulation picture.My Fosc is 368.64M,when I change Fpd from 184.32M to 221.184M,my Fosc remains.
  • Hi dean,

      The details are as follows in my test,

    The Fosc is 368.64M,the original Fpd is 184.32M with pre-R=2 and Fden is 184320,so when the pll output is 10137.63M, Fvco%Fpd=30K,there is 30K IBS here;

    But when i changed Fpd from 184.32M to 221.184M with Fosc remaining unchanged by changing pre-R to 10 and Mult to 6X. so when the pll output is 10137.63M,there shouldn't  be a  30K IBS arising in theory.But it is not in fact.I don't know what's the problem.

    Here is my Pllatinum software :

    .

  • Hi,

    So lets get some numbers

    For the first case:

    Fosc = 368.64 MHz

    Fpd = 184.32 MHz

    Fvco = 10137.63 MHz

    Fvco % Fpd = 30 kHz

    Fvco % Fosc = 184.35 MHz 

    But lets take your second case:

    Fosc = 368.64 MHz

    Fpd = 221.84 MHz

    Fvco = 10137.63 MHz

    Fvco % Fpd = 184.35 MHz

    Fvco % Fosc = 184.35 MHz

    So what we see that for the Fvco % Fpd, we are at 184.35 MHz.  It seems far from 30 kHz.  But not really.  For spurs, the worst case is when you are 30 kHz away from an integer boundary, which we are.  But the second worse case is when you are 30 kHz away from Fpd/2.   So this is 30 kHz away from 184.32 MHz, so this has a 30 kHz spur.  For this second spur, maybe the spur is 6-10 dB lower than it would be from the integer boundary, but still high.  Theoretically, for the MASH engine, it puts out lots of energy at this 30 kHz when close to (but not at) Fpd/2 multiples.

    For diagnostic purposes, you might want to try

    PLL_R_PRE=9

    MULT=6

    PLL_R=1

    Fpd=245.76

    Fvco%Fpd = 61.47 MHz

    Regards,
    Dean

  • Hi Dean,

     1. First of all, thank you very much for your careful answer.

     2. For the second case,i still can't understand.Here Fpd=221.184M,Fpd/2=101.592M,Fvco=10137.63M. So Fvco%Fpd=184.35M and Fvco%(Fpd/2)=73.758M,which are far from an integer channel.Why says the spur is not away from Fpd/2 multiples?

    3. Yes, I have tried your suggestion.The spur is clear at 30K offset and it's just 60K@-58dbc left .But it can't be applied to other frequencies such as 10321950k,10690590k,11059230k...etc.Does it mean when i need to avoid this IBSs at this frequencies i have to change to another Fpd frequency?

    Regards,

     Z

  • Hi,

    2.  I see what you are saying.  184.35 MHz is not related to 221.84 MHz.   184.35 MHz is suspiciously close to 184.32 MHz. But where could 184.32 MHz come from?   For instance, with 368.64 MHz Fosc, CALCLK_DIV is probably DIV2.  But this gives 184.32 MHz for a mixing product.  You might try to first lock the part with CAL_CLK_DIV=1, but then change it to 0 (DIV 1) to see if it has any impact on the spur.  Also, if there is a factor of 2 in the division between Fosc and input to the programmable multiplier, it could come from there.  I do notice that my PLL_R_PRE=9, which has no factor of 2.

    3.  OK, so the phase detector frequency was shifted and the spur was mitigated.  This suggests that this 30 kHz spur is some sort of mixing product involving the phase detector frequency.  You might need more than one phase detector frequency, but I'm not sure.

    Regards,

    Dean

  • Hi Dean,

      I have checked CAL_CLK_DIV in R1,my setting is 0x080a,so it is div4 not div2 and there is no factor of 2 in the division.

    Regards,

    Z

  • Z,

    If CAL_CLK_DIV is div4, then we have the frequency of Fosc/4 running on the chip.

    Fosc/4 = 368.84/4 = 92.21 MHz

    Now the div 4 is implemented is with two cascaded div2 stages, so there is also Fosc/2 on the chip as well.

    GCD(10137.63,368.84) = 20 kHz

    GCD(10137.63,184.42) = 20 kHz

    GCD(10137.63,92.21) = 10 kHz

    GCD spur can happen when there are two sources.  I'm not sure if the 30 kHz is a multiplie of the 10 kHz case, but it is very hard to debug spurs without trial and error.  So if you set CAL_CLK_DIV=div1, then if this is the issue, it should make the spur at 30 kHz go away.  If not, it is likely something else.

    Regards,

    Dean

  • When you suggest using a higher slew rate input, can you advise me on what that would be?  Does that mean using a square-wave reference instead of a pure sinusoid?  (Intuitively I would expect that to create a series of additional spurs from the harmonics.)

  • Square wave input is desirable.  The first thing that the LMX2594 does is square up the input, so it is better if it is initially squared up to begin with.

    The best results for spurs I have seen are with differential LVDS input.

    Regards,

    Dean