LMK04828BEVM: LMK04828 EVM test

Hi Meng Liu,

If you change the input to either PLL1 or PLL2, you need to make sure that the VCXO and VCO frequencies share a greatest common divisor (GCD) frequency, and that the loop bandwidth is stable for the chosen configuration. For example, if you are trying to lock PLL1 with a 25MHz reference and a 122.88MHz VCXO, the phase detector frequency must be 40kHz, implying the R-divider must be 25e6 / 40e3 = 625, and the N-divider must be 122.88e6 / 40e3 = 3072. The default config phase detector frequency for PLL1 is 1.024MHz, and the loop filter components are tuned to provide a loop bandwidth of 100Hz and a phase margin of about 70° at this phase detector frequency. If you change the phase detector frequency to 40kHz, you must select new loop filter components (in this case, C1 = 68pF, C2 = 3.3nF, R2 = 1.8MΩ yield approximately the same settings). Note that you can use PLLatinum Sim (PLLATINUMSIM-SW) to simulate different loop filter settings for PLL1 and PLL2

If you want to generate 2500MHz from PLL2, you have two options:

1. Use the default oscillator at 122.88MHz, set VCO_MUX to VCO0, and reduce the PLL2 phase detector frequency to the GCD frequency of 160kHz (R-divider of 768, N-divider of 15625). You would also need to change the loop filter to ensure stable phase margin, and lower loop bandwidth (<1.6kHz). The phase performance will be dominated by the VCO noise, as PLL2 is usually operated with a higher phase detector frequency to achieve better in-band noise.
2. Use a different oscillator (such as a 125MHz VCXO, or use PLL2 by itself and drive OSCin with a signal generator after disconnecting the VCXO power and output connections). If PLL2 reference is 125MHz, the phase detector frequency can also be 125MHz (R-divider of 1, N-divider of 20), which greatly improves the phase noise performance of the PLL. 125MHz VCXO would also allow for a wider loop bandwidth at PLL1, which could be beneficial if the close-in phase noise of the 25MHz source has better performance than the VCXO.

Your E2E account is new, so I'm not sure how much background knowledge you have with PLLs. In case some background would be helpful for you, we have put together some training videos with audio transcripts, explaining the fundamentals:  

Regards,