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LMX2820: query of PFD frequency overclocking and FOM, 1/f noise

F L1
Prodigy 60 points
Part Number: LMX2820

I'm working on designing a PLL and plan to implement LMX2820 in it as main loop. actually I have total 3 questions and I will describe it below separately.

1. PFD frequency overclocking  Cause I want to use LMX2820 as main loop in my design, the most parameters I care about are PFD frequency in integer mode. Datasheet specified the integer mode PFD frequency is maximum 400MHz, but to match our design goal, I hope I can use 431.25 to 462.5 MHz as PFD frequency only within integer mode. So, my concern is whether it can support such higher PFD frequency?

2. 1/f noise  I noticed that the datasheet shows 1/f noise at -134dBc/Hz @ 1GHz with 10KHz offset, actual measurement at Figure3 of datasheet is -116.4dBc/Hz @ 6GHz with 10KHz offset shows about 2dB degradation.  Cause I have spec requirement at 10 KHz offset, I wonder whether it can be improved about 3~4dB based on actual measurement value, which means my ideal 1/f noise should be -135~-136dBC/Hz @ 1GHz with 10KHz offset without degradation, I expect to achieve -121dBc/Hz @ 6GHz with 10KHz offset using divide ratio 13.

3. FOM noise  The spec is -236, but from experience it usually can't be achieved, and compared with Figure3 of datasheet, I suppose actual FOM is -233 or so, is it correct for reality? I expect to achieve FOM = -233 in actual design.

Appreciate if you can help to explain my queries and it would be great helpful!

  • 0
    TI__Guru** 107780 points

    Hi FL1,

    1. Although pfd may work at a higher frequency, we only guarantee the operation of up to 400MHz in integer mode. 

    2. Please use PLL Sim to estimate what you can get with your configuration. If 10kHz offset phase noise is important to you, you must use a very good phase noise reference clock. 

    3. FOM is a measured value. Figure 6-4 has the plot.

  • 0 in reply to Noel Fung
    Prodigy 60 points

    Hi, Noel

    thanks for the inputs. I'll have a try to verify if it works well for the question 1. Could you pls tell me how much the PFD frequency you tried?  And, for the question 2, of course I have a good reference and the pedestal bottom neck is the LMX2820 1/f noise, I will do some simulation with the PLL Sim to see if any improvement. For the last question, corresponding to 1/f noise, I think even the -233 still can works, it is not a big problem.

      have a nice day!

  • 0 in reply to F L1
    TI__Genius 11900 points

    Hello FL1,

    The PFD frequency is only tested to the specifications in the datasheet at production / across temperature.

    For an integer PLL, at room temperature, it's possible to squeeze a phase detector of maybe 50 MHz higher than the specification but we did not test this on multiple parts or at other temperatures.

    As Noel mentioned above we only guarantee the operation of up to 400MHz in integer mode.

    Thanks,

    Vibhu