LMX2485E: Datasheet Questions

Hello Itoh-san,

Kazuki Itoh said:

 About the microwire input, what is the timing requirement to assert CLK high after toggling LE (hign  > low > high)?
I believe CLK input is not accepted when LE is high.

I expect 25 ns, but would need to confirm.

Kazuki Itoh said:

About the N counter formula, could you please help me to check the RF_P value?

In case RF_P=0, it is 8 (8/9/12/13 prescaler). So RF_N = (8 x 3) + (4 x 1) + 3

Yes, for RF_P bit = 0 then with RF_C = 3, RF_B = 1, RF_A = 3 --> Results in RF_N = 31

Kazuki Itoh said:

In case RF_P=0, it is16 (16/17/20/21 prescaler). So RF_N = (16 x 3) + (4 x 1) + 3

Yes, for RF_P bit = 1 then with RF_C = 3, RF_B = 1, RF_A = 3 --> Results in RF_N = 55

Kazuki Itoh said:

Is the PLL oscillation frequency formula below correct?
Oscillation Frequency = OSCin frequency * (RF N counter value + RF PLL numerator / RF PLL denominator)  /  RF R divider value 

Yes if doubler is not enabled.  You need to also account for the doubler.  OSCin * (2 if doubler enabled) / RF R div value * (RF N + (RF PLL num / RF PLL den)) = VCO Frequency.

Kazuki Itoh said:

If IF PLL is unused, is it OK to leave COPUTIF and FINIF NC(open)?
Also, does it have any recommended register setting when the IF PLL is unused?

It is ok to leave the outputs floating, however set the IF_PD bit = 1.  I also suggest setting ATPU bit  = 0 to prevent IF_PD being cleared when writing to R0.  If ATPU is = 1, then I suggest also setting the IF_TRI = 1 and be sure to set IF_PD = 1 if after any write to R0.

Kazuki Itoh said:

Is PLL still working when ENOSC is low while OSCout doesn't output the signal?

Yes, it is only to control the OSC out pin.

73,
Timothy

Hi Itoh-san,

The LE-to-CLK setup time (the time between LE = low and the rising edge of the first CLK) is 25ns minimum.