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LMK00334-Q1: Please teach me that the Output rise time 20% to 80% when using 100MHz input.

Koichi Kajihara
Prodigy 50 points
Part Number: LMK00334-Q1

I plan to use the LMK00334RTVRQ1 as a clock buffer for PCIe 2.0.

 

The datasheet lists the Output rise time 20% to 80% when using 250MHz input.(typ.225ps, Max.400ps)

Please teach me that the Output rise time 20% to 80% when using 100MHz input.

 

I am thinking the following as input.

 3.3V differential LVDS clock. Freq:100MHz, Slew rate:4.95V/ns.

And, I thinking the following as output.

 2 PCIe Gen HCSL clock.

 

Thanks.

  • 0
    TI__Mastermind 33350 points

    Hello Kajihara-san,

    I expect the same or just slightly lower rise/fall times when using 100MHz input. The interface speed only begins to impact the rise/fall times at higher frequencies, so at lower frequencies the rise/fall time should be consistent.

    Regards,

  • 0
    TI__Intellectual 770 points

    Hi Kajihara-san,

                              Although the datasheet specification for rise and fall-time is for a 250 MHz input, i DO NOT expect much difference for 100 MHz input. The output rise and fall time are more sensitive to output load and the cable length. As long as these two match the data-sheet test conditions, there will not be much deviation with frequency. 

    Hope this answers your question.