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LMK61E2: Cannot Change Value in Reg 26 - PLL_NDIV_BY0

Eric Brooks
Prodigy 30 points
Part Number: LMK61E2


Hello,

I have a LMK61E2 that is factory programmed for 156.25 MHz LVPECL output.  I am using an embedded uP to modify register values during operation without writing to EEPROM.  I am able to update Reg 23 - OUTDIV_BY0 and have it take effect, but I cannot write to Reg 26 - PLL_NDIV_BY0 and see a change.

Is there something unique with writing to one register vs. another?

Thank you for any insight.

  • 0
    TI__Expert 6140 points

    Hello, 

    No there isn't any difference in writing reg26 vs reg23, so the same method should work. 

    When you say you can't see it take effect, how are you judging this? Are you reading back the register and it shows the original value and not the programmed value? or are you hoping to see some kind of impact in terms of frequency? If you're just updating the Ndiv numerator the jump may be small enough (ppb level) where its not really easy to observe. 

    Thanks and regards,

    Amin

  • 0 in reply to Amin Eshraghi
    Prodigy 30 points

    I have read back Reg26 and confirmed that the updated value was written.  I am expecting to see a frequency change from 833.33 MHz to 900 MHz, which is easily detectable on a scope.

    Is there something that needs to be done to activate the new setting?

  • 0 in reply to Eric Brooks
    Prodigy 30 points

    Per the LMK61E2 Data Sheet, the VCO has be re-calibrated anytime a change is made to a VCO parameter.

    8.3.12 VCO Calibration
    The PLL in LMK61E2 is made of LC VCO that is designed using high-Q monolithic inductors to oscillate between
    4.6 GHz and 5.6 GHz and has low-phase noise characteristics. The VCO must be calibrated to ensure that the
    clock outputs deliver optimal phase noise performance. Fundamentally, a VCO calibration establishes an optimal
    operating point within the tuning range of the VCO. Setting R72.1 to 1 causes a VCO recalibration and is
    necessary after device reconfiguration. VCO calibration automatically occurs on device power up.

    Once the VCO calibration is complete the new Reg 26 - PLL_NDIV_BY0 value takes effect.