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LMX2572: LMX2572: MUXOUT high impedance when CSB=High?

Part Number: LMX2572
Other Parts Discussed in Thread: LMX2595

Dear Support Team,

we want to connect 3 devices to the SPI all sharing the same MISO signal lane.

Is MUXOUT high impedance during CS not active when set to readback mode?

If yes I think we can simply connect the 3 devices to MISO.

If no I think we should add buffers and enable them with the respective CS.

According the timing diagram in the datasheet it looks like MUXOUT is always driving LOW

only when data is output then it is driving HIGH. Any statement on high impedance when

not active i could not find.

Thank you and best regards

Christoph

  • Hi Christoph,

    Typically MUXout is push-pull at all times.

    However, you're in luck: within the last 48 hours, I discovered that by changing an undisclosed bit (R1[3]=0), the MUXout output can be changed to Hi-Z.

    We are working on creating a datasheet update which discloses this bit, as well as some guidance on how to use it. For now, please refer to the following E2E thread for preliminary guidance on how to program the tri-state bit so that the device can yield the SDO bus correctly. Although this thread describes LMX2595, the relevant register is the same and the relevant bit is in the same position.

    LMX2595: CSB line communication

    Regards,

  • Hello Derek, thank you very much for this information. This was very helpful. Best regards Christoph