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LMK01801: Pb with Pin Control Mode

Bruno Bouchereau
Prodigy 10 points
Part Number: LMK01801

Hi,

I design a board with a LMK01801 configured in PIn Mode (En_Ctrl_Pin = High) as described in Table 3.3 of the Datasheet.

I have some trouble with the divider on CLKout12 and 13 which are configured in :4 (CLKoutDIV2=LOW). Sometime i obseve a divide by 4 outputs, but sometime (very often) it's only a divide by 2.

I have 4 boards and they all have the same problem.

Any idea ?

Regards.

Bruno

  • 0
    TI__Genius 16845 points

    Hi Bruno,

    Any idea what causes the divide value to swap between 2 and 4 during operation ? Does it occur randomly, after power-up, etc.

    Only CLKout12/13 are affected and the other clocks are unaffected?

    Have you confirmed the clock input is meeting specifications of table 5.4? With default register settings after POR, input muxes are set to bypass, so frequency should be limited to 1600MHz.

    We could review the schematic for obvious errors. I'm not sure what's causing this behavior, this issue has not been reported before. I wonder if you observe the same behavior on the LMK01801EVM?

    Kind regards,
    Lane

  • 0
    Prodigy 10 points

    Hi Lane,

    Thanks for your reply.

    I did not find a way to post my schematic, but it is very simple. I have a 100MHz oscillateur (LVDS) that feed the clkin of bank A ; this bank is configured as LVDS outputs and divide by 1. One of these output feed the clkin of bank B. I want 25 MHz LVCMOS clk on Clkout12/13, so a divide by 4.

    I notice that on the "first" power-up, the Clkout12/13 are OK, but if I power-up my borad few seconds or minutes after, I very often get a divide by 2 (50 MHz output)

    I never notice a problem on the others outputs.

    As I mention, I have 4 (soon 5) boards ; all of these baord have the same behaviour.

    I plan to verify this behavior on a LMK08101EVM, but I did not veriry it yet.

    Regards

    Bruno

  • 0
    Prodigy 10 points

    Hi,

    I have some result with my experiments on the LMK01801EVM board.

    I  notice a effect regarding when then Cklin appears :

    - if I powered the LMK01801EVM board when the clock is prsent, I have a divide by 4 clk on Clkout12/13

    - if I powered tyhe board with no clock,  when the clk appears, I have a divide by 2 clk on Clkout12/13.

    Same behaviour if I turn ON/OFF the clkin, when it appears, I have a divide by 2 clkk on Clkout12/13.

    Can you explain this bug ?  

    Regards

    Bruno

  • 0 in reply to Bruno Bouchereau
    TI__Genius 16845 points

    Hi Bruno,

    Thank you for the additional information from. We must investigate this bug further to debug the behavior.

    I will first try and replicate this bug in the lab before the lab end of the week. Then I will check with the backend team to see if they can provide the explanation.

    Kind regards,
    Lane