LMX2571: Frequency deviation for FSK

Hello Noel,

I have one more related question: If I select the denominator equal to 2^24, the Application Report SNAA309 says that overflow / underflow problem is taken care with when denominator is equal to 2^24. Could you explain, please, how does it work if carrier has numerator that is either close to 0 or close to 2^24? Will be incremented / decremented the integer N in case of overflow / underflow of the result of (numerator +- FSK_DEV)?

Thanks,

Alex

Hi Alex,

While DEN is 24-bit but the deviation is only 16-bit, in general, there will be no overflow issue.

However, in the extreme case, i.e. when NUM is very close to 0 or 2²⁴, then overflow will occur. 

If this extreme case is needed in your system, there is a workaround.

1. On every channel, the software determines the closest integer boundary channel
2. Determine the amount of offset from integer boundary
3. Program LMX to the integer boundary channel
4. Program the amount of offset to FSK_DEV_SPI_FAST register
5. This sets the carrier frequency.
6. To do FSK
7. Program the desired FSK value minus the amount of offset ((2) above) to FSK_DEV_SPI_FAST register

Here is an example.

OSCin = 19.2MHz

Fpd = 4.8MHz

Fout = 479.999MHz (=480MHz – 1kHz)

Fdev = +/-4kHz

DEN = 2²⁴

(1)    Closest integer boundary channel = 480MHz

(2)    Offset from integer boundary = -1kHz

(3)    Program LMX2571 to lock to 480MHz

(4)    Program FSK_DEV_SPI_FAST = 62041 (=-1kHz deviation)

• Now the output frequency of LMX2571 will be 479.999MHz

(5)    To achieve +4kHz frequency deviation, program FSK_DEV_SPI_FAST = 10486 (=+3kHz deviation)

• Now the output frequency of LMX2571 will be 480.003MHz

(6)    To achieve -4kHz frequency deviation, program FSK_DEV_SPI_FAST = 48060 (=-5kHz deviation)

• Now the output frequency of LMX2571 will be 479.995MHz

Hope this helps.

Hello Noel,

I tried what you recommended: the FSK SPI FAST mode with your settings, it doesn't work. When FRAC=0 the positive swing is correct (clean and frequency shift is OK), the negative swing is wrong (there is some small negative swing ~1.5kHz and it is noisy).

I got the same result for the FSK PIN mode (we can't use FSK SPI FAST mode in our product for fast link rates and it looks like the mechanism of action is the same for all FSK modes).

Please advise.

Thanks,

Alex

Hello Noel,

I didn't mention in last message that I use the denominator 8,000,000. Right, I verified that your solution works, but only for the denominator 2^24, it looks like overflow/underflow is handled on silicon, but only for the denominator 2^24.

We can't use the denominator 2^24 for a wide band fast radio modem that uses frequency deviation 50-80 kHz. Do you have any solution for the denominator 8,000,000 ?

Thanks,

Alex

Hi Alex,

LMX2572 can support a higher freq deviation and there is no restriction on the denominator.

Hello Noel,

I try to increase the Fpd from 80 MHz (works fine with exception of integer boundaries) to 120 MHz in order to avoid these integer boundaries, but synthesizer is not locked. My settings are:

Fosc = 40,000,000;

R_Pre_Div = 1;

R_Pre_Mul = 3;

R_Post_Div = 1;

Fpd = 120,000,000;

Vco = 5,120,000,000;

ChDiv1 = 4;

ChDiv2 = 4;

N_Prescaler = 4;

Denominator = 8,000,000;

Integer = 10;

Numerator = 5,333,333;

Expected frequency: 320,000,000.

All other settings and external RC components are the same as for Fpd = 80 MHz. All parameters are within proper ranges.

What could be changed to make it work?

Thanks,

Alex

Hi Alex,

Couples of issue here:

1. The input frequency range for the MULT is 10MHz to 30MHz, you should make Pre-R = 2 and MULT = 6. 

2. N = 10 is too small for a second order or above fractional engine, I think this is the main reason it did not lock. If you use 3rd order engine, suggest make N greater than 21.

Pre-scalar = 4 can reduce current consumption but the phase noise will be degrade, it is up to your application need.