Hi sir,
What is the reason that the reset time of TPL5010 in ESD test is much longer than the design parameter?
Conditions:
device is wrapped in a plastic case, 15kV, sealed
Test data:
Design value is 2min 30sec,
The normal test is about 2min31sec,
The static test data is between 3 min and 6 min.
Thanks for your clarification.
