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ADS1298: Can be synchronized with ADC timing

Koyo Asaishi
Intellectual 1750 points
Part Number: ADS1298
Other Parts Discussed in Thread: ADS1299,

Hi team,

Customer is interested in ADS1298 and ADS1299.
I have several questions.

  1. Can both devices output signal which is synchronized with AD conversion timing
  2. Can both devices delay the output timing (half cycle)?
  3. ADS1298EVM has protection circuit like below but ADS1299 doesn't have. What is the difference?

Best regards,

Koyo

  • 0
    TI__Genius 11550 points

    Hi Koyo-san,

    Thanks for the post.

    Can you please clarify questions #1 and #2? I am not sure if the output timing you refer to is for each device or using both devices in a system.

    We have decided to remove the protection circuit for the ADS1299 EVM to simplify the EVM design. The protection circuit for the ADS1298EVM is left unpopulated and intended as a placeholder if there is a need to evaluate any protection circuit using the EVM. You would have to develop your own protection scheme based on the end product classification of the product/design you wish to build.

    Thanks

    -TC

  • 0 in reply to TCT
    TI__Intellectual 1750 points

    Hi TCT,

    Thanks for the answer about #3.

    About #1 and #2, I want to ask for each device, not using both devices in a system.

    Best regards,
    Koyo

  • +1 in reply to Koyo Asaishi
    TI__Genius 11550 points

    Hi Koyo-san,

    Both ADS1298 and ADS1299 digital output behave similarly. The ADS129x is a multichannel, simultaneous sampling, delta-sigma ADC where the output is an average of many samples. The operation of the delta-sigma is different compare to the traditional pipeline or SAR ADC. The actual data rate of the device depends on the clock frequency and the decimation rate of the modulator. The DRDY signals will indicate the completion of the new conversion data, and its data can be retrieved at any time before the next DRDY cycle. There is no delay adjustment in the output timing.

    I hope this answer your question #1 and #2. Please let me know if I misunderstood your questions.

    Thanks

    -TC

  • 0 in reply to TCT
    TI__Intellectual 1750 points

    Hi TCT 

    I understand as both output can synchronize with ADC Hi/Lo change timing.

    Customer want to delay the timing half a cycle.
    Is it possible?

    If impossible, could you share a solution to achieve it?

    Best regards,
    koyo

  • 0 in reply to Koyo Asaishi
    TI__Genius 11550 points

    Hi Koyo-san,

    I will reach out to you for further clarification. 

    Thanks

    -TC