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ADS1262: Two-channel data logger with post-processing

Part Number: ADS1262

ClearBox0.1.pdfClearBox.docx

Brian -- thanks for your earlier help on board layout.  We are designing a low-frequency datalogger, and I'd like to ask you to comment on my design approach.  Actual sample rates will be at most 100SPS, we have sample and reference channels that will be monitored separately, and then ratioed numerically.  We don;t need to make any real-time decisions -- we can process all data off-line later.

ADC:  Use two ADS1262s as the only devices on separate SPI channels.  Monitor differential inputs from sample and reference channels.

Signal conditioning:   Don’t try to eliminate RF noise using analog filters – we can fix this at the end with a digital filter.  (I’m nervous about this, and I’ve left an input RC filter on my board in order to test this assumption.)

Clock:  Don’t worry about clock jitter at these low sampling rates – using the two ADCs’ internal clocks separately should be OK.

Power:  Reduce EMI and RF noise by proper layout and, if necessary, by shielding.  Don’t use a switched on-board supply,  and take the ADCs’ AVDD and DVDD inputs from ultra-low-noise LDO regulators (your TPS7A2050 and TPS7A2033) that are driven by a low-noise external voltage (called 6V on my schematic).   

Reference voltage:  Use a shared high-precision, low-drift external reference voltage (your REF5025) for both channels.  Internal references won’t work – they will drift differently and be a significant noise source.

1/f noise:  Chop the signals to push 1/f noise to out-of-bandwidth frequencies.

Sampling rate:  It’s always possible to move from oversampled to under-sampled, but not the other way.  Oversample at 100Hz, and after the entire signal has been acquired, decimate and filter to an appropriate sample rate depending on the the sample.  Typically that's a sampling rate of 8 SPS or a 4Hz bandwidth. 

Filters:  We are primarily interested in the time-domain signal, so sinc filters (moving average in time) might be optimal.  We don’t need to worry about computation time, so convolution calculations using large FTs with zero-filling are OK, and we can lose the first few seconds and the last few seconds of signal in order to obtain narrower transitions.  We can experiment with a variety of “optimal” FIR low-pass filters.   Filtering at very low cutoff frequencies should all but eliminate 50Hz and 60Hz line noise.

I have attached a document and schematic that contains proprietary information.  If you have time to take a look at thos, that would be great.

  • Hi Patrick,

    I just want to make you aware that this is a public forum and anything you share here is available to any other person who comes to this site.

    If you want to share proprietary information in a more discrete way, you should be able to edit your post and then send me the info via private message. I just want to be clear about this before moving forward

    -Bryan