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ADS1220: Internal Oscillator Frequency Specification.

Charles Jenkins59
Intellectual 360 points
Part Number: ADS1220

Nowhere (that I can find) is the internal oscillator frequency specified in the data sheet. The accuracy is specified and references to the external oscillator of 4.096Mhz are called out but there is not a spec for the nominal internal oscillator frequency.

Can the internal oscillator be observed at the CLK input if not driven by an external oscillator? Also missing from the data sheet is the CLK input impedance.

  • +1
    TI__Guru** 112935 points

    Hi Charles,

    The internal oscillator frequency is not given to lessen any confusion for anyone connecting an external clock.  All operation is given relative to an external clock frequency of 4.096MHz.  So all timing and number of tclk periods as given in the datasheet tables are valid. 

    There is no way to verify the actual oscillator frequency apart from making an indirect measurement relative to the output data rate.  So the CLK pin is strictly an input pin and the internal frequency cannot be directly monitored.  All that said the internal oscillator runs at 1.024MHz nominally in Normal/Duty Cycle modes and the external clock is divided down.  However, if we were to give all timing relative to the internal clock, then we would need two tables to show the number of clock cycles.  For example, Table 11 would need one timing for the internal clock and a second timing for the external clock.  The digital filter responses would also require two different sets of graphics.  So to keep everything less complicated it was decided to keep all timing relative to a single external clock frequency.  In the end it makes no difference as every thing scales proportionally.

    The CLK input is a digital CMOS input and the input characteristics are as given in the IBIS model available on TI.com.  Standard crystal oscillators or even micro timer outputs can be used to drive the clock pin.

    Best regards,

    Bob B

  • 0
    Intellectual 360 points

    I disagree. It makes a HUGE difference what the internal oscillator frequency is. Why have it there at all if you can't use the equations given to calculate the tclk interval and figure out sample times... or calculate where the comb filter results might lie based on sample rate calculations.

    Data rates could be re-calculated if using the internal oscillator but without knowing the internal oscillator frequency the data rates mean nothing.

    No mention of suggested termination for the CLK pin is provided. As a CMOS input it absolutely must be terminated. Which direction may affect power consumption. I usually go to the electrical characteristics for the input specifications, not IBIS models.

    In my opinion as an ex-TI FAE section 8.3.7 needs a lot of work.

  • 0 in reply to Charles Jenkins59
    Intellectual 360 points

    Forgot to add thanks for the 1.024 Mhz. But that must be placed in the data sheet electricals and again in section 8.3.7. Of course it all scales but how will anyone know what to scale to if they don't know the internal frequency? I was about to assume it was 4.096Mhz.  My application measures 60Hz AC current and keeping the filter response notches away from 60 Hz is critical.

  • 0 in reply to Charles Jenkins59
    TI__Guru** 112935 points

    Hi Charles,

    We appreciate your opinion.  Divide the external tclk periods by 4 and you will have the answer relative to the internal clock. 

    As to the CLK pin note the information under the Pin Functions table under the part pin graphics on page 4.  Yes the pin should not be left floating and tying it low forces the internal oscillator.  Any clocking on the pin disables the internal oscillator.  As to the CLK pin impedance, we don't normally give the specifications for the SCLK either other than the IBIS model.  And according to the IBIS model the characteristics are the same.

    Best regards,

    Bob B

  • 0
    Intellectual 360 points

    Thanks Bob. Agree on the termination. My Kolman days worked with a lot of clock inputs that were overdriven to force an external clock. Thought this might be the case.  Please add the 1.025Mhz or the statement "internal oscillator 4.096/4" to the clock section. It will save misconception the internal is the same as the tables.