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ADC34J44: Power Down Operation. Does SPI work?

Part Number: ADC34J44
Other Parts Discussed in Thread: ADC32J44

If the PDN is pulled up from power up, is it possible to acess the device through the SPI interface, without first driving the PDN pin low?

Whilst in power down what do the device outputs do? Do they all float? are some driven?

Whilst in power down are the device inputs responded to?

Does the ADC32J44 operate in the same way?

  • Hi Steve,

    I am checking on this and will get back to you soon.

    Regards, Amy

  • Hi Steve,

    If the PDN pin is pulled high from power up, it is still possible to read/write through the SPI interface.  

    While in powerdown, the digital outputs (JESD) go into tri state. The inputs can still have a signal applied, but the absolute maximum ratings should always be observed, even in powerdown mode, for all device pins. Please refer to the datasheet for this information.

    The SPI pins remain active in order to bring the device out of powerdown.

    The power rails (1.8V+) should remain in the same state as if in non-powerdown mode.

    Regards, Amy

  • Thanks, that's useful.

    Also, to be clear, what is the relationship between the PDN pin and the register settings?

    Is it that if either demands a powerdown, then it happens.

    So for the device to be powered up both the register & the pin must demand normal operation

  • Hi Steve,

    If both PDNs are applied (pin control and SPI), the ADC will be in power-down state.

    If one of the two (either/OR) PDN options are asserted, the ADC will be in power-down state.

    Both options for PDN must be in the non-power-down configuration to be in normal operation mode.

    Best Regards,

    Dan