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recommended ADC on PIN array signal sampling

FRANK1
Expert 8075 points
Other Parts Discussed in Thread: ADC3422

Hi sir,

I now have a PIN array. I want to choose an ADC to collect PIN signals.
I want to make this array into a camera interface.
4 channels, 12bit or above are required.
This is a reference given by the supplier.

it's single ended input.

I read your ADC3422 and wonder if it can be applied to my application.

If ADC3422 can be used on my application,

My question is:

1. How do I connect in single ended signal and CLK single ended signal? CLK is output by FPGA?

2. Does CLK only need single ended output? Are isolation coupling capacitors required?

If not, what do you recommend?

Thanks for your clarification.

  • +1
    TI__Genius 12780 points

    Hello,

    Yes, you can use single-ended inputs.

    1. For a single-ended clock, there should not be a noticeable impact on performance when compared to a differential input clock. However, the clock coming from an FPGA will likely have high rms jitter (in the nano seconds, likely. Optimal is in femto seconds to match the aperture jitter of ADC.). Since you are capturing a camera output (changing DC levels), I don't think this will effect performance too much.

    The sample clock is internally biased. An AC coupling capacitor is required at the input to CLKP, and an AC cap to GND on CLKM is also needed.

    2. For a single-ended analog input, there will be a 3 dB loss in signal power / dynamic range since only half of the ADC input is being exercised. The single-ended signal will go to AINP (biased at VCM), and AIN will need to be biased to VCM (+0.95V). VCM is an output of the ADC, and is the mid-scale value of the analog input range.

    I'd be interested to understand the customer application requirements, so please feel free to send me an email if you would like to discuss further.

    Best Regards,

    Dan