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ADS5401: Lower 5 bits of ADS5401 always "0" output even test patten mode.

wesley chen
Prodigy 40 points
Part Number: ADS5401

Hi Sir,

We use the ADS5401 as an ADC input board, somehow, few of boards have observed a weird symptom, the lower 5 bit of output LVDS interface always "0".

We used the "Test Patten" function of the ADS5401 and got the same symptom, but for good boards, we doesn't duplicate the symptom.

Could you teach us how to start the debugging? or where can find out the related direction?

Thanks and Happy new year.

  • 0
    TI__Guru* 91947 points

    Wesley,

    Are you following the instructions shown on page 18 of the data sheet when setting up the ADC for test pattern mode? Are all 4 available patterns showing the same issue?

    Have you verified the lower 5 bits are stuck at "0" using an oscilloscope and monitoring the ADC output traces if possible?

    Are you following the reset timing shown in Figure 2 of the data sheet and the initialization sequence shown in section 8.5.1?

    What is the status of SYNC input on the failing units? Can you send your register settings?

    What is the sample rate?

    Regards,

    Jim