ADS4245-EP: Global power down

Hi Pawan,

I'll be looking into this issue for you, and I will get back to you early next week.

Best,

Luke Allen

Ok

Pawan,

Yes, the configuration for the CTRL pins you have listed will configure the ADS4245 to enter global power down. A register write is not required for this to occur. This can be configured both with the CTRL pins as well as writing to the register. When in global power down, the output buffers will be in the high-z state.

Are you using the ADS4245 EVM board? How are you measuring the output state?

Best,

Luke Allen

Just out of curiosity, what is the link referring to as I found it on Forums too. Please assist
e2e.ti.com/.../ads4245-channel-standby-and-power-down

1. In this snapshot Green Trace is A1 output of ADS4245 when configured in ChA Standby. A1 is externally pulled high

2. In this snapshot Green Trace is A1 output of ADS4245 when configured in Global Power down. A1 is externally pulled high



We saw similar results on Global power down mode on ChB and hence, the question.

-Pawan

The total system setup is eight lower significant bits of ADS4245 port B connected to BOOT UP pins on SM320C6748 and we are facing difficulty in pulling up/down the bootup pins for SM320C6748 as seemingly, ADS4245 is pulling it low while configured in Global power down mode and we need those pins high for SPI1 Flash configuration.

Related link: 
e2e.ti.com/.../sm320c6748-hirel-upp-with-boot-up-pins

-Pawan

Does ADS4245 need active clock input for entering global power down mode?

Hi Pawan,

Seems there are several questions here.

Can you share your schematic with us? Particularly the digital interface between the ADC and SM320 part?

Sounds like from all the queries the two devices are pulling at each other and will not let go of the power down state of the ADC?

If so, I would suggest putting an AC coupling cap (0.1uF) between each ADC digital output and input of the SM320 part. This might help break the contention here.

See other answer to your questions.

Does ADS4245 need active clock input for entering global power down mode? A: No

Just out of curiosity, what is the link referring to as I found it on Forums too. A: you can only put CHA in standby with the control pins. Otherwise you can put both channels in standby with the spi register.  

Respectfully, if you have other questions outside of the original question at the top, please start a new E2E post.

Regards,

Rob

Hi Rob,
Do you mean the DSP can still pull before loading code into it? The reason why I asked this is the ADS output connects to DSP BOOT pins in SPI1 Flash configuration and DSP is unable to boot up.

Thanks,
Pawan

Hi Pawan,

It might be possible, but it would be good to look at the schematic to see how these two devices are connected and to which pins are connected together.

I assume you are not using a buffer in-between the two devices? They are directly connected? Again, a schematic would help.

Thx,

Rob

Hi Rob,
1. This is snapshot of DSP pinout to ADS


2. Snapshot of ADS4245 pinout


3. BOOT pin configuration, we have used 1kΩ resistors for pullups and pulldowns and not 5.6kΩ. Instead of 3.3V, we have BOOT pins pulled up to 1.8VDD Which is used by ADS4245 as well.

Thanks,
Pawan

Hi Rob,
To add to the above snapshot
CTRL1 -> pulled high to 1.8VAN
CTRL2/3 -> pulled down.
SEN -> pulled down (Can this affect the behavior?)

Thanks,
Pawan

Hi,
Anything in this regards team TI?

-Pawan

We also did the same experiment on ADS4245 Eval board and found same issues.

1. Blue is 1.8 VDD, yellow is ADS B2 (which is pulled high externally) and the green is CTL1


CTL2 and CTL3 are connected to GND using jumpers on EVAL board. As you can see that despite of ADS B2 being pulled high externally, it gets pulled low during ADS power up in Global power down mode. So, it seems ADS4245 for some reason, is pulling output lines during this mode of operation.

-Pawan

Hi Pawan,

I apologize for the delay. Regardless of the control lines. I don't see how the design will capture any data. The ADC has an LVDS interface.and based on the two schematic snapshots above, this shows a direct connection. This means the circuit is incomplete until a 100ohm differential resistor is affixed between each output pair of the ADC near the SM320 device.

Regards,

Rob

Hi Rob,
We're configuring it to be parallel CMOS configuration which I doubt needs 100Ω resistors. Please clarify if this is incorrect.

Thanks,
Pawan

Hi Pawan,

As long as the VOL and VOH level between the two devices are met. Is that the case?

Also, on your EVAL board experiments, are you using the full setup from TI? Both ADC eval brd and data capture board?

Regards,

Rob

Hi Rob,
As long as the VOL and VOH level between the two devices are met. Is that the case?
Re: Yes, we do meet VOL and VOH.

Also, on your EVAL board experiments, are you using the full setup from TI? Both ADC eval brd and data capture board?
Re: No. We're just using the EVAL board.

Thanks,
Pawan

Hi Pawan,

Let's go back to the original question:

Does pulling CTRL1 high and CTRL2/3 low configure ADS4245 to global power down? Yes Do I need to write to registers to achieve this? No, if the control pins are used then this will work.
Also, what is the state of output during global power down? It depends on what it is connected to. they will flow High or Low.

The issue is we configured the CTRL pins for global power down and it does not work as we do not see hi-z state on outputs. Please assist. What are you expecting the outputs to look like?

I am lost on what is not working? If the ADC is in power down, it won't work. No data will be seen at the outputs.

Regards,

Rob

Hi Rob,
Also, what is the state of output during global power down? It depends on what it is connected to. they will flow High or Low.
- Please refer to the schematics snapshot I shared as those are the connections.

The issue is we configured the CTRL pins for global power down and it does not work as we do not see hi-z state on outputs. Please assist. What are you expecting the outputs to look like?
- I expect the outputs to be stable to whatever those have been pulled up/down to, instead, we see noise (can be due to whatever ADS4245 reads at input)

I am lost on what is not working? If the ADC is in power down, it won't work. No data will be seen at the outputs.
- So, we expect ADS4245 to put outputs to hi-z as per the ADS4245 datasheet but seemingly, it does not. 



Also, the same issues were validated on ADS4245 EVAL board as well regarding which I shared the scopeshot in my previous responses.
The control signals and SEN configuration for our design is
CTRL1 -> pulled high to 1.8VAN
CTRL2/3 -> pulled down to GND
SEN -> pulled down to GND

-Pawan

Hi Pawan,

Just one more confirmation, from what I understand you are saying that the ADC's digital output bits are fluttering/noisy and do not sit high or low when the global power down is initiated with the control pins? Furthermore, you are saying this happens, the digital output bits are noisy, if you use the EVM with no output digital bits connected and it also happens when in your system with the ADC connected to the SM320 device?

Please correct me if I am error here.

If I have the correct understanding. I will test our EVM on Monday when I am back in the lab and I will update you.

Using your specific conditions outlined above

Thank you,

Rob

Hi Rob,
Yes. That is what we saw except for evaluation board we have the particular pin which is suppose to read high (logic 1) was pulled low (logic 0) instead of being noisy.

Thanks,
Pawan

Hi Pawan,

We checked the EVM and we do not see any output noise on the output data bits. The outputs are logic low when the power down is initiated with either the control line approach or the ADC GUI.

There maybe something wrong with how the SM320 part is configured and I will send this E2E thread along to someone on their team to look over your schematic and configuration. I am just not familiar with this device.

Regards,

Rob

Hi Pawan,

I forwarded this tread onto the Processor team in order to understand the SM320 connections and setup.

Regards,

Rob