TSW14J57EVM: timed_out_error

Hi Neeraj,

Thank you for the response. Here is an update from the customer:

The customer mentioned using the On-Board Clock Configuration, but with an External Clock Configuration, and got the same time out error and the same LEDs on/off.

However, instead of the firmware “ADC12DJxx00RF_JMODE5” mentioned previously, they tried the Firmware "TSW14J57revE_DDR_RxOnly_L8_Reconfig_FIRMWARE.rbf" for the FPGA from the HSDC Pro GUI, selecting "Instrument Options > Download Firmware" , then going in the folder "C:\Program Files (x86)\Texas Instruments\High Speed Data Converter Pro\14J57revE Details\Firmware".

When the firmware is downloaded to the FPGA, the LEDS acts differenly than before:
D1 off
D2 blinking
D3 off
D4 on
D5 slightly on
D6 off
D7 off
D8 on
D9 on

Looks like at least with this firmware the ADC established a SYNC with the FPGA (LED 3 off), but the FPGA can not detect the device clock from ADC since LED4 is not blinking

Can you confirm if the customer is using the wrong firmware? or is there anything that they missed when selecting the On-Board Clock configuration?

Another thing is that the customer is not using the Bandpass filters as specified in the User Guide: could this be the problem why the device clock from ADC is not detected by the FPGA?

Thanks again for the support.

Regards,

Marvin

Hi Neeraj,

Thank you for the help. Here is the response from the customer:

"I discovered that the waveform generator that we were using was broken, hence we did not get a correct sampling clock. Now we are using a correct one. But I still have some problems. I think could be related to the Firmware provided and I will try to explain why.
So this is what I do:
- Connect the FMC+, connect the power cables and power on the board, connect the USB cables.
- Open the "ADCxxDJxx00RF EVM GUI", select "External clock", select "1000 MHz" (because I provide a 1GHz sampling clock with a pulse generator), select "JMODE5", click on "Program Clocks and ADC". See picture "ADC_GUI". Please note that I am providing externally a sampling clock of 1GHz, a reference clock of 125 MHz, and a square waveform to be sampled and detected by the ADC. And yes, jumper J13 is installed.
- Open "HSDC Pro", and now I should choose the device from the drop-down list above the "Capture" button.

Now my first question: in the list provided, there is nothing directly related to the ADC that I am using, which is the ADC08DJ5200RFEVM. I think I should find in the list something like "ADC08DJxx00RF_JMODE5" but it does not exist. Does it exist something specifically for my board, or is it ok to select another device from the list which will work anyway with my board (for example the "ADC12DJxx00RF_JMODE5")?
Meanwhile, I tried with the "ADC12DJxx00RF_JMODE5":
- I select this device in the drop-down list, then at the question "Do you want to update the firmware for the ADC?" I click "Yes". I get LEDs 1,3,5,6,8,9 ON and LEDs 2,4,7 OFF. I click on Capture and I capture something (so I don't have the TMED_OUT_ERROR anymore) but I only see noise. You can see it in the "picture1" attached.

Here my second question: how is it possible that , even if LED3 is ON (means that ADC and FPGA not SYNC) and LED 4 is not blinking (means that clock of ADC is not sampled by FPGA) we don't get a TIMED_OUT_ERROR as before?
And then my third questions, why we are only sampling noise and not the input waveform that I am sending with the waveform generator (I am sending a square wave)?
And if I try to Capture again (by clicking on the circled arrow "Click to reload device INI" and then clicking on "Capture"), I get the exact same noise waveform as before, you can see the attached "picture2" and "picture3" which are two different Captures, but they are exactly the same waveform. Here my fourth question: how is that possible? Should't they be two different waveforms since I am sampling in two different time instants?

Picture 1

Picture 2

Picture 3

GUI

Thanks in advance for the help, I tried to explain everything as precise as possible in order to have no misunderstandings."

I hope this helps.

Regards,

Marvin

Hi Neeraj,

Any update on this follow up question?

Regards,

Marvin

Hi Neeraj,

Thanks for the help. Here is the response from the customer:

"I think that the DEV and SYS REF clocks are phase locked since they come from the same pattern generator.

And I am indeed using the INI file ADC12DJxx00RF_JMODE5."

Regards,

Marvin

Hi Neeraj,

Good day. Can you comment on the follow-up response from the customer?

Regards,

Marvin

Hi Marvin,

I will be taking this offline and we can talk over email.

Regards,

Neeraj