This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AFE2256: Question on some specs

Part Number: AFE2256

Hi team,

I have a few questions about the AFE2256
1. The manual says that under the same configuration, the subsequent acquisition does not need the SYNC signal, how to determine the subsequent acquisition of the MCLK from the 0th start?
2. Regarding the use of gate driver clock and Gate Driver Start, when do I need to configure the corresponding registers, how do I use these two signals, do I need to read the corresponding registers or wait for how long to come out automatically on the sdout?
3. Is there a more detailed explanation and some recommendations for the acquisition timing and related signals of the AFE2556 chip?