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ADC12DJ800: DC frequency signal measurement & interleave spurs

Part Number: ADC12DJ800
Other Parts Discussed in Thread: ADC32RF44, ADC32RF54, ADS54J66, ADC32RF42

Hi team

1. Is ADC12DJ800 capable of measuring near DC frequency signal? From the datasheet 8.4.6 it says that near DC signal is not allowed with Background Calibration enabled.

2. If measuring DC frequency signal is possible as long as Background Calibration is disabled, could you please advise according to below:

  2-1) Necessary time to perform Foreground Calibration

  2-2) Offset drift by time (datasheet has VOFF_DRIFT but this is temperature drift correct?)

3. Does ADC12DJ800 have Interleave Spurs between ADC cores? Or is it removed by Background Calibration?

My customer is currently using ADC32RF44 and had some Interleave Spurs came out from the offset error between ADC cores, but it can be removed through the Fs/8・Fs/4・Fs*3/8・Fs/2 offset corrector.

I don't see this function on the datasheet of ADC12DJ800

4. Could you please advise a better solutions if ADC12DJ800 does not seem to be the best one?

Regards

  • Hi David,

    It might be better to understand the customers needs first. 

    So, from what I understand the customer is using or evaluating the ADC32RF44?...and they are looking at the ADC12DJ800 because of the IL spur issue?

    Please let me know the sampling rate, and analog input BW of interest they plan to use?

    If they don't like IL spurs, it would be good to know the minimum SFDR that can be tolerated for the applications.

    Lastly, do they need to DC couple in their application?

    Please advise, and we can help down-select the best ADC for the customer.

    Thanks,

    Rob

  • Hi Rob

    Thanks for your response!

    For you questions:

    So, from what I understand the customer is using or evaluating the ADC32RF44?...and they are looking at the ADC12DJ800 because of the IL spur issue?

    I believe those are for different applications. ADC32RF44 was used by the customer before and they've done some evaluations to it, therefore it's got compared with the ADC12DJ800.

    Please let me know the sampling rate, and analog input BW of interest they plan to use?

    This would be DC~1kHz, also some other requirements:

    Sampling frequency: higher than 400MHz
    Resolution: higher than 12bit
    CH count: more than 2ch

    protocol: JESD204B orJESD204C

    If they don't like IL spurs, it would be good to know the minimum SFDR that can be tolerated for the applications.

    They didn't provide specific SFDR tolerance

    Lastly, do they need to DC couple in their application?

    Yes, they will need DC couple

    Looking forward to your suggestions on devices!

    In the meanwhile, could you please also advise regarding to my questions 1 to 3? The customer is pushing me for an answer.

    Regards

  • David,

    Regarding questions 1-3:

    1. Is ADC12DJ800 capable of measuring near DC frequency signal? From the datasheet 8.4.6 it says that near DC signal is not allowed with Background Calibration enabled. The ADC12DJ800 is capable of DC-coupling. To achieve this, a DC-coupled differential amplifier must be used with its output common mode set to the VA11 supply voltage of the ADC12DJ800. Section 8.4.6 is referring to the DC offset error calibration of the input buffers, not a background or foreground calibration particularly. 
    2. If measuring DC frequency signal is possible as long as Background Calibration is disabled, could you please advise according to below: Because both of the calibration techniques inherently calibrate out the DC offset error of the ADC core, and the background calibration runs continuously, the real only way to calibrate this ADC while DC-coupled is to disable/mute the input signal externally such that the DC component on the analog inputs float to the ADC VA11 supply voltage, then run a foreground calibration. At this time, the input buffer calibration can also be run. Note that foreground calibration always runs at startup so the input signal should be muted while the system is starting.
      1. There is a flag at bit0 in the CAL_STATUS register (0x6A) to indicate when foreground calibration is complete. I'm not sure the exact time of this.
      2. Time does not play a factor in the offset error, only temperature. This temperature drift is the reason to run foreground calibration based on changes in environment. 
    3. Does ADC12DJ800 have Interleave Spurs between ADC cores? Or is it removed by Background Calibration? You cannot remove interleaving spurs on a device which is non-interleaved. This ADC32RF44 is an interleaved ADC and has interleaving correction, this ADC12DJ800 is a non-interleaved architecture so there are no interleaving spurs.
    4. I will let Rob drive this discussion, however I would like to reiterate that the instantaneous analog bandwidth (IBW) is a major deciding factor for an ADC, which you left out in your response to Rob. Considering you mention the customer wants to sample at 400MHz, this means the maximum IBW will be the nyquist zone, ie 200MHz, but at the same time the customer is wanting to sample at near DC, indicating a wideband input. My recommendation is to use this ADC12DJ800 device. The only other alternative which meets all customer specifications will be the ADC32RF42 (interleave architecture) or the ADC32RF54 (non-interleaved). For the cost, it would be in the customer's best interest to use the ADC12DJ800. The other devices we have meeting these requires simply do not support a true DC-coupling application. If the customer does not truly need to DC-couple, then the ADS54J66 would be my recommendation.

    Regards, Chase