ADC32RF45: This part is overkill - I need something simpler

Hi Seamus,

I'd agree with you that the ADC32RF45 is just a tad overkill for your 60kHz atomic clock receiver  as this device is meant for L-band and S-band applications (up to ~4GHz). Since your input frequency will be a constant 60kHz, I would highly suggest an external filter to help cut down on the out-of-band noise.

I am transferring this post to the precision ADC group so you have the most suitable solution for your receiver. The benefit of these precision ADC is the data can often be handled with low cost processors using a simple serial interface rather than an expensive and complex FPGA (which our high speed converters require). As far as I know, these precision ADCs do not have any down-conversion features (often found in the GSPS RF-targeted application data converters) however there should be plenty of resources available online regarding the implementation of decimation with a microcontroller. Kindly await a response from our precision ADC team.

Regards, Chase

Thanks, Chase. Yeah - at 60 kHz, I can't imagine I'd need much down-conversion :) So - just to confirm, will someone in the precision ADC group group contact me? Also - is there a different team I should contact for the LNA/preamp/filters, etc?

Hi Seamus,

I figured since you were look at an RF targeted data converter (ADC32RF45) that it was due to some of those additional features, such as integrated DDC block and etc. At 60kHz, it certainly is not necessary to perform any down conversion. Someone from the precision ADC team should reply here within the next 24 hours or so.

We do have an amplifier team which should be capable of providing assistance as well. I would suggest to create a new post with an amplifier part number to receive help from the amplifier team.

For filter help, we don't have any specific team at TI to help with that. However, once you find a suitable data converter for your application, I can help out with the filter design if desired to the best of my ability. Typically, for our MHz and GHz applications, we suggest 3-stage filters as we find the passive component tolerances/mismatch begin to hurt the filter performance as we move to higher-stage filters. In the kHz range however, a 4-stage filter is probably a suitable option.

Regards, Chase 

Hi Seamus,

We do not have any parts specifically targeting your application, you could build something from discrete components, but have you looked at this part:

https://www.mas-oy.com/portfolio/mas6180c/ ?  It seems to be exactly what you are looking for.

Tom - thanks for the URL!  The part does indeed look like a good solution for building a WWVB receiver.  I've seen something similar at Universal Solder:

this: https://universal-solder.ca/product/60khz-wwvb-atomic-clock-receiver/

and this: https://universal-solder.ca/product/everset-es100-mod-wwvb-bpsk-phase-modulation-receiver-module/

But what I was *hoping* to do was to get a bit deeper into this by designing and building a direct sampling receiver. Ideally, this could be done using a microcontroller with an in-built ADC (for example: https://github.com/luigifcruz/pico-stuff/tree/main/apps/piccolosdr).  The "PICO" uC has an ADC that is said to do 500 ksps, but have been told its noise floor is very poor. I wanted to build a prototype with a better ADC (TI  ) to see how that compared with the "PICO uC", & figured I could find a pre-amp/LNA & perhaps filters - and good advice - here also.

FWIW, This is a long-postponed first step for me into the world of SDR, so I'm also just scratching about looking for information.

Thanks,

~S

OK - that PICO uC has a 12-bit SAR converter with only 8.7 ENOB (effective number of bits).  if you want to go down the uC with internal 12-bit ADC path, we have various devices in our MSP430 family of controllers.  These parts have ENOB on the order of 10.9 to 11.4 bits.  From a stand alone ADC perspective, we have converters up to 18-bits.  You can use this Product Search to see the various options from our portfolio.  You can use the sliders to change the search criteria.

It seems what I heard was true - that seems like quite a downgrade. How does one determine an ENOB (or ideal resolution) figure for an application such as this? Is it strictly trial-and-error, or is there a reasonable method to get a bound on the required value?

To be honest, I don't know much about SDR so I don't know what 'good enough' is for monitoring the WWV signal.  I would have to do some research into the signals/waveforms that are being received.

Neither do I !  :)  This may help:

There are now two (2) signal formats, the 2nd being added recently. The "new" format (a BPSK modulation I think) is described here (https://everset.tech/signal/), the old format (AM) described here (https://www.nist.gov/system/files/documents/2017/04/28/Bin-2719.pdf). I thought I'd start with the simpler AM signal.

The direct sampling receiver "architecture" is described here (https://panoradio-sdr.de/direct-sampling/), among many other places.

Oh - forgot to include this document (https://www.nist.gov/system/files/documents/2017/04/28/Bin-2591.pdf), perhaps the best of the lot!

Hi Seamus,

I was looking at this document as well.  Besides getting the AM signal to the input of your ADC, it seems to me that all you really need to do is determine the high time of the carrier signal to determine if you are receiving a zero (800ms), a one (500ms) or a marker bit (200ms).

Hey Tom,

I've not finished reading it yet, but that's a hugely interesting article - thank you! I recall reading that the original objective of WWVB was to be a *frequency standard*. The modulation and time broadcast seemed to be more of an afterthought. And it's funny (laughing at myself here) that in all the articles I've read, this is the first I've noted that ones and zeros are defined by the "dwell time" on an AM state. I'm quite rusty on what little I ever knew re modulation schemes, but this scheme seems almost to beg for errors! And I suppose that further illuminates the impetus for the "new" modulation scheme that "overlays" a phase shift?

Has any of this led you to thoughts on how to characterize a minimum ENOB?

~S

Funny you should say that.  I was going to suggest a simple comparator as well.  Resolution wise, 8 bits is enough to get the job done.