This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hello,
I have a couple of queries regarding the DAC3174 Circuit Design which are explained as follows:
1. I am using a DAC3174 IC in one of my new projects and as I can see the clock voltage supply input is 1.8V (CLKVDD). But I am using CDCLVP1208 clock buffer circuit to drive the DAC clock input. The CDCLVP1208 is referenced to 3.3V and the DAC3174 CLKVDD is connected to a 1.8V. Is it possible to drive the DAC clock like I explained above? For your information I have chosen CDCLVP1208 clock buffer circuit as there are many other circuits which are required to be driven by a differential clock input.
2. The DAC analog output is connected to the input of an RF modulator (ADL5375) through a Dual-, Differential, Low-Pass Filter μModule with Gain and ADC Driver (ADAQ8088). The ADAQ8088 power is supplied from a 3V regulator and the ADL5375 power is supplied from a 5V regulator. So, my question is that, Is there any problem to drive DAC3174 analog output for the above explained configuration?
Best Regards,
Vysakh Mailat
Vysakh,
We are looking into your questions and will get back to you with an answer within 2-3 business days.
Regards,
Geoff
Vysakh,
In both of your questions, yes, this will work. The key point that needs to be made is that the common mode voltages for either the output or input interface should be DC blocked with 0.1uF caps on each input/output pin.
Regards,
Rob
Hi Rob,
Thanks for the confirmation. This information really helps.
Regards,
Vysakh Mailat