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Original question:

ADC34J24EVM: Can I evaluate it with Xilinx FPGA

ADC34J24EVM: ADC34J24EVM SPI mode and CPLD source.

Jason Lee
Prodigy 75 points
Part Number: ADC34J24EVM
Other Parts Discussed in Thread: ADC34J24, LMK04828

Hi,

I am trying to do SPI communication with ADC34J24 and LMK04828 via FMC using ZCU102 Xilinx FPGA board.

I have couple of questions?

1. Can I have FPGA Source code for 5M80ZT100 CPLD?

2. Is ADC34J24 on the board runs in 3-wire SPI or 4-wire SPI with the ADC3000 GUI?

3. There is address 0 register in the ADC3000 GUI but not in the ADC34J24 data sheet.

From ADC34J24 data sheet, register address starts from 1.

Which one is correct?

4. Is LMK04828 on the board runs in 3-wire SPI or 4-wire SPI with the GUI?

Thank you.

  • 0
    TI__Mastermind 19785 points

    Hi Jason,

    1. Find source code for CPLD here: 4682.ADC3xxxEVM CPLD Code.zip

    2. ADC34J24 uses 4w SPI only.

    3. The GUI format covers many different devices and this was put in to future proof. ADC34J24 uses 4w SPI only and its register map will start at 0x01.

    4. The LMK04828 will use 4w SPI for readback operations with RESET (pin 5) being used as SDO.

    Regards, Chase 

  • 0
    TI__Intellectual 1960 points

    Hey Jason, 

    Just to add to what Chase said, 

    The CPLD is being used for some glue logic for 3-wire SPI. I typically don't mess with it and am able to program the devices just fine pretending it's not even there. As Chase stated the LMK supports 3 and 4 wire SPI while the ADC only supports 4 wire SPI. 

    I have some python code I wrote so you can program the ADC outside of the GUI. hopefully this can help you get started if you want to write your own application to program it.

    Regards, 

    Matt

    1447.ADC34J24_SPI.zip