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ADS7029-Q1: SPI Clock Speed ambiguity

Joshua Vasquez
Prodigy 10 points
Part Number: ADS7029-Q1

Hi folks,

The ADS7029-Q1 datasheet lists a "SPI-Compatible Serial Interface: 32 MHz" on the first page, but all other details related to timing requirements suggest a maximum clock speed of 24MHz.

Section 6.6 even explicitly lists the SCLK frequency as 24 MHz maximum.

Is this device compatible with a 32 MHZ SPI clock?

Cheers--and thanks in advance!

  • 0
    TI__Guru**** 172546 points

    Hi Joshua,

    Welcome to our e2e forum! We're trying to understand where that 32MHz entry came from.  In the meantime, use the 24MHz clock timing for the ADS7029.

  • 0 in reply to Tom Hendrick
    Prodigy 10 points

    Ok, I suspect this might be a copy-paste bug between the ADS7029, ADS7039, and ADS7049 datasheets.

    The ADS7049 datasheet consistently lists a max SPI clock speed of 32MHz everywhere. In fact, a 2Msps throughput isn't possible for the ADS7049 unless the SPI rate is 32MHz. There just isn't enough time for enough time for few bits at speeds like 24MHz.

    The ADS7039 datasheet, like the ADS7029 datasheet, lists a 32MHz spi clock speed at the top, but then refers to a max clock speed of 28MHz in most other locations.

    I would be eager to know if the ADS7029 and *39 are also compatible at 32MHz spi speeds, but I'll spec a design assuming they're 24MHz and 28MHz maximum respectively.