Other Parts Discussed in Thread: TSW14J57EVM,
I am currently working with IT ADC12DJ5200RFEVM and TSW14J57EVM Evaluation boards.
I am able to capture ADC jesd_transport output signal data through Quartus Prime Signal Tab Logic Analyzer.
Question: I am interested to know in what in what format the ADC code is implemented? Is it “Unsigned Decimal”, Hexadecimal, Signed Decimal in Two's Complement or something else?
Thanks for the help!