AFE5809: 5MHz LPF seems not working

Hi Team,

I’m using 12MHz sampling clock with the AFE5809, so I choose the 5MHz LPF before ADC. The input signal scans 1MHz ~ 6MHz, but I cannot see obvious suppression above 5MHz. What’s wrong?

The commands set for AFE5809 through SPI is as follows:

1         (addr 0x01)0000 0001       (data)1000 1000 0000 0000

Bit[11]=1 to suppress low frequency noise; bit[15]=1 to Enable single end clock

2         (addr 0x02)0000 0010       (data)0000 0000 0000 0000

      bit[15:13]=000, normal operation

3         (addr 0x0a)0000 1010       (data)0000 0001 0000 0000

bit[8]=1 to make outputs of test pattern of the 8 channels to perform synchrously. That is, I tested to set the above register to Test Pattern and got a satisfied synchrous outputs of test patterns.

4         (addr 0x16)0001 0110       (data)0000 0000 0000 0001

      bit[0]=1 to disable digital demodulator

5         (addr 0x33)0011 0011       (data)0000 0000 0000 1000

      bit[3:1]=100 set LPF 10MHz, bit[13]=0 PGA gain-24dB

6         (addr 0x3d)0011 1101       (data)0100 0000 0000 0000

       bit[14]=1 to enable 5MHz_LPF

7         (addr 0x34)0011 0100       (data)0000 0001 0000 0000

bit[7:6]=00 set 50Ω termination，bit[8]=1 Enable termination，[14:13]=00 LNA gain 18dB

8         (addr 0x35)0011 0101       (data)0000 0000 0000 0000

bit[11:10]00- Low noise Power mode

AND I noticed the important information from the AFE5809 manual:

AFE5809 with date code later than 2014, that is date code >41XXXX, has below additional features which can be enabled by Register 61[15,14,13]. Existing analog performance remains the same. …

• 61[14] enables a first-order 5-MHz LPF filter to suppress signals >5 MHz or high-order harmonics.

…

Note: This bit is supported by AFE5809 with date code later than 2014, that is date code >41XXXX.

The topside code of my chips is 29ZNC53.

 Is this the date code?    29ZNC53 > 41XXXX ? 

 Thanks !