• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 47 subscribers
  • Views 96 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

ADC3643EVM: Clarification about the REV E schematic

ADC3643EVM: Clarification about the REV E schematic 2

Fabien Berland
Prodigy 90 points
Part Number: ADC3643EVM
Other Parts Discussed in Thread: ADC3643

Hi,

I'm using the ADC3643EVM REV E with a ZC702 EVM board and in this context I'd like to use the FPGA_CLK instead of the ADC's internal clock.
Following my last post (e2e.ti.com/.../adc3643evm-isue-with-dclk), I understood that I had to connect R37 and R47 and unsolder R38, R46, C17, C20, C19, R41, R44.


By consulting the gerber files provided on your site, I found the location of these components but it does not correspond to my board.


Is it possible to have the gerber files corresponding to the REV E version of the ADC3643 EVM to be sure of the components I need to solder and desolder?

Thanks