ADS7280 - CPOL & CPHA

Hi Joseph,

Welcome to our Forum!  Can you possibly post screen captures of the control lines to the ADS7280?  Seeing the FS/CS, SCLK, SDI and SDO all in one screen capture from your oscilloscope would be great if you can get that.  Let us know which processor you are using and what speed your SCLK is running at as well.

Tom,

I'm so happy (and surprized) you're working on a Sunday. I'm on my way into the office right now to collect the data you've requested because getting this ADC going asap is of huge importance to my team. I'll be in the office checking for your replies by 11:30 CST. If you have a contact number or other means that I can communicate with you more efficiently, please let me know. I'd be happy to temporarily post my contact information as well if you're available to speak in person. Just let me know what works best for you.

I'm using a Freescale Kinetis K10 processor. The bus speed is 50MHz. I've tried varying SCLK speeds from 500KHz up to 42MHz.

The CFR is configured as default except for the TAG line and I also configured the conversion to use the internal 21MHz clock.

I'll have more details for you shortly. THANKS!

Hi Joe,

How are things going?  I've chatted with Mark as well and am wondering if you've got everything straightened out now with the ADS7280.

Hi Tom, 

We've got it working decently enough to present out prototype next week. The measurements thus far appear to be spot-on. After our demonstration, I'll be trying to tweak my ADC driver to greatly improve efficiency. I plan to model figure 2 of the datasheet and will probably have a handful of questions for you when the time comes. I've yet to go above 500kHz with my SPI bus. That'll probably be the first thing I toy with.

As for now, here's a couple things I'd like to understand better:

1. Is this ADC continuously sampling in the background anytime it's not in a low-power mode or processing a conversion?
2. During my testing, I observed that once I've received a full scale reading, I'd continue getting that same reading. In this case, I'd have to reboot the unit before receiving normal readings again. Is this known behavior? If not, then perhaps our op-amp or other circuitry is locking up...

Thanks for the follow-up!

Joe

Tom

//If the amplifier saturates at some level that exceeds the analog supply rails, you might cause the ADS7280 to latch up.  Does a SW reset clear the condition?//

We are seeing a condition once in a blue moon when the ADS7280 powers up it just does not respond to anything.  A recycle of the power fixes the problem almost all the time.   I have a new board I have been testing and it worked for a whole week before I seen the issue, and once I re-cyckled power it went away and has not returned..  The ADS7280 never outputs an EOC when it is in this condition.    Over the past few months this has popped up from time to time and people have just recycled power and moved on.  

Is this the condition of the latch-up you describe?     Any suggestions as to find out why this happens?    The device is controlled through an FPGA.   I do not perform a SW reset on the device before operation is this recommended?

Hi John,

Try adding a software reset to your initialization routine - clear bit 0 with one write sequence and then set the desired configuration (and set bit 0 to 1) after power up.  I believe that will take care of the stalled conditions you've been experiencing.  This should also work if you saturate the inputs by exceeding the rails.  In that case, you may need to reset the device two times - essentially once to re-establish the serial communications and the second time to get back into the desired operational mode.

Tom,

YES the software reset on power up fixed the problem.  We had 4 board in our boneyard that are now functional.

Thanks

John

Great!  Thanks for letting us know!