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ads1244 - DRDY?

hj
Intellectual 650 points
Other Parts Discussed in Thread: ADS1244

So on the ADS1244, the DOUT and DRDY pins are the same pin and I was wondering how that works?  I'm sending this data over to my PIC microcontroller, and the PIC waits until its buffer register is full to read in the data.  Is my buffer register gonna read in that bit as well as the information?  

  • 0
    TI__Guru** 113765 points

    Hi Hj,

    The ADS1244 will pull the DRDY/DOUT line low if it is in a high state, or will pulse from low to high back to low if it was in the low state following the end of the conversion cycle.  On the rising edge of SCLK the valid data will begin to appear with MSB first.  You should latch the data (if bit-banging) on the falling edge of SCLK.  If using the SPI peripheral, make sure you are using the correct phase when reading the data, and dwell clock low when idle.  See figure 12 on page 11 of the datasheet.

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Intellectual 650 points

    So I am using a PIC with this chip, and communicating over SPI.  Can I just monitor Din (connected to the A/Ds Dout) until it goes low, and then when it does, I reactivate SCLK to clock out data?  

  • 0 in reply to hj
    TI__Guru** 113765 points

    HJ,

    Yes, that is one option.  The difficulty is knowing when the transition takes place of a high to a low when polling unless you force the DRDY/DOUT high by sending extra clocks.

    Another method is to parallel the DRDY/DOUT to an additional pin that is interrrupt capable.  When waiting you can enable the interrupt for a high to low transition, then disable the interrupt while reading the data, then re-enable the interrupt for the next conversion completion.

    Best regards,

    Bob B