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About the power consumption of DAC34SH84

hisakichi kobayashi
Intellectual 950 points
Other Parts Discussed in Thread: DAC34SH84

Hi all,

It is DAC34SH84 and requested the current waveform.
What does it become on condition of the following?

　fDAC = 1.5 GSPS, 4× interpolation,
　mixer on, QMC on, invsinc on,
　PLL disabled, 20-mA FS output, IF = 500 MHz,
　Within DACA/B/C/D、used to DACA/B.

Used High Speed Data Converters Forum: RE: About the power consumption of DAC34SH84 forum.

best regeards,
Hisa Kobayashi.

  • 0
    TI__Guru 68174 points

    Hi Kobayashi-san,

    If only channel A and channel B DAC output are used, you may turn off channel C and D output and save 2x20mA = 40mA on the 3.3V AVDD supply.

    AVDD = 115mA - 40mA = 75mA @ 3.3V

    DIGVDD = 710mA @ 1.3V

    DACVDD = 40mA @ 1.35V
    CLKVDD = 95mA @ 1.35V

    The digital path of channel C and D cannot be shut-down. Therefore, you will not see current consumption improvement on 1.3V and 1.35V supplies. If channel C and D are not used completely, we recommend the following:

    1. Tie all DCD[15…0]N pins to 1.3V DIGVDD.
    2. Tie all DCD[15…0]P pins together
    3. Place a 60 ohm resistor to ground from the DCD[15…0]P node

     This will provide a guaranteed 100 mV differential voltage across all 16 receivers for all combinations of DIGVDD (1.25 to 1.35 V) and LVDS termination tolerance (85 to 135 Ω). It also only requires a single resistor. The max power increase is 28 mW on DIGVDD (21 mA) at max supply and min load.

    Please let me know if I have answered your questions. 

    -Kang

  • 0 in reply to Kang Hsia
    Intellectual 950 points

    Hi kang,

    Although it has been understood that AVDD decreased,

    However, although an understanding of a back formula is impossible somehow, it does not understand liking what to express.
     

    Regerds,

    Hisa Kobayashi,

  • 0 in reply to hisakichi kobayashi
    TI__Guru 68174 points

    Hi Kobayashi-san,

    I believe that you are asking the reason why AVDD 3.3V decreased by 40mA after disabling output channel C and D. The reason for this is that the power consumption level that I gave you before is based on 20mA full-scale output current for each channel. By disabling output channel C and D, you save 20mA constant current draw for 2 channels, thus saving 40mA.

    Please let me know if I have answered your question correctly.

    -Kang

  • 0 in reply to Kang Hsia
    Intellectual 950 points

    Mr. kang.

    Your answer is very wonderful.
    Thank you a very match.

    Regerds,
    Hisa Kobayashi.