Hi all,
A certain user using DAC5689 is designing by rule called CLK1= 112 MHz, and CLK2= 672 MHz ('x6').
CLK1= 112 MHz (it consists of system clock so)
CLK2= 672 MHz -- the maximum of 800 MHz or less -- the 112-MHz maximum integral multiple 'x6'.
In addition, 'x4' was not used in order to approach 200 MHz, if it is 'x4'.
Is it satisfactory although set up by filter =x2 ?
best regards,
Hisakichi Kobayashi.