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Clocking DDC316

Drake
Prodigy 90 points
Other Parts Discussed in Thread: DDC316

Hi,

   Just want to get some verification on clocking these DDC316 parts. The spec says system clock  min. 1  max. 40MHz and Data clock max 40MHz.

My question is can the data clock be anything below 40MHz or 20MHz when daisy chained?

I am thinking to have my system clock at 16 MHz and data clock at 4-8MHz. Is there any issue in doing this?   

It seems to me that for clocking out the data it shouldn't really matter.

Thanks,

Drake

  • 0
    TI__Guru* 93305 points

    Drake,

    I think in most applications, the DCLK would be operated at a slower rate than the CLK rate. I think in general, in your application that would be fine too.

    However, there are few things to note. In the datasheet, you should look at the  section on "Data Retrieval Time" on page 14. If you retrieve the data in TDM mode, your throughput for data is limited. TDM is needed for the Daisy Chain mode of retrieving the data. While you can't use the parallel data output for daisy chain, it illustrates that you need to get the data out quickly.

    You'll need to factor in the integration time and the number of devices daisy chained together. The important thing is that you want to clock out all of the data from the conversions before the next conversions are completed. Once the next set of conversions are completed, the output data registers are overwritten and you lose the last set of data.

    Joseph Wu

  • 0 in reply to Joseph Wu
    Prodigy 90 points

    Thanks Joseph,

       That exposed a detail I hadn't looked into yet.

    Your right I think that I will be ok. Generally, my integration times will be much longer than the retrieval for this application, so that'll help.

    Drake