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ADS7850 data output before Conversion finished

Other Parts Discussed in Thread: ADS7850

Dear Sir or Madam,

Problem description:

I have two boards one is sensor board and another is controller board where they are connected with 100-pin flat cable. The ADS7850 is at the sensor board, and FPGA is at the controller board. It's found that if I shielding the flat cable(21cm) with foil(use foil cover the cable and short the GND to foil at both side of the cable), the SDO of ADS7850 will have chance 1-4 cycle output before conversion finish(14 sclk), which cause the read back ADC value be enlarged 2~16 times. Then I try to measure the wave form of the sclk at ADS7850 side, when the scope probe touch the sclk pin of ADC7850, the abnormal case will disappear(the probe cap is about 10pF). So I don't have any idea about what is wrong with it. 

BTW, when I use the non-shielding cable(70~80cm), even the length was triple, the abnormal case will not be observed.

Would you mind give some hints about what will cause the SDO output before conversion finsihed on ADS7850?

Thanks a lot.