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DAC5688: DAC5688 Timing Issue

Part Number: DAC5688

DEARS.

End customer is Testing to use DAC5688.

Pls help to check below questions.

DAC5688 internal timing error occurred.

What is the solution?

- DAC5688 Register Value -

Address            Hex Value

0x01                0x0A               // Normal inputs on CH A & B, 2’s complement, 4x interpolation

0x02                0x09                // INV_SINC filter enabled, Mixer(NCO) enabled

0x03                0x00                // Default

0x04                0x00                // Default

0x06                0x00                // Default

0x07                0x00                // Default

0x16                0x05                // NCO accumulator and registers synchronous with TX_ENABLE

0x17                0x05                // FIFO synchronous with TX_ENABLE

0x1A               0x0C                // PLL disabled (Ext. clock in use)

0x08                0x00                // FREQ_NCO[7:0]

0x09                0x00                // FREQ_NCO[15:8]

0x0A               0x00                // FREQ_NCO[23:16]

0x0B                0x50                // FREQ_NCO[31:24]        =>       FREQ_NCO = 0x50000000 =>       Freq = FREQ_NCO x 400MHz/2^32 = 125MHz

0x05                0xC2                // It`s for use SIF_SYNC as below, but actually, SYNC at TX_ENABLE

0x05                0x82                //

When energize the power, RESETB = LOW maintain dozens of msec, then after set HIGH, register will set as above data.

So, assert TX_ENABLE : 0 -> 1 and synchro at TX_ENABLE for start DAC.

Input data rate is 100MSPS and set oversampling to 400MSPS(by 4x Interpolation) for execut DAC.

Thank you