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ADS6423: ads58c48

Part Number: ADS6423
Other Parts Discussed in Thread: ADS58C48, ADS4249

Hi,

We are designing a 4 channel data capture system as below:   Minimum slew rate of signal = 300 ns; sample time minimum 30 ns;  11 bit resolution;

12 samples = 25 ns;        40 MSPS per channel conversion rate;

 Initial choice of ADC was a 4 channel ADS58C48, the criteria being parallel interface.

The choice of either serial or parallel interface ADC calls for an FPGA to do the interface with

System controller ( MCU ) or a super speed serial bridge peripheral controller.

 Could you suggest a 4 channel mux with circuitry  for the ADC

ADS58C48

Or

ADS64XX 12 bit with serial LVDS output interface.

 

Thanks in advance

 

Regards,

Krishnan

  • Hi,

    I don't know what you are looking for in a 'mux'.  Are you looking to mux the digital sample bus?  The usual interface to catch the sample data from a high-speed ADC is an FPGA, whether it is a dual-data-rate (DDR) LVDS parallel bus or a serialized LVDS data stream as in the two devices you have mentioned.  The LVDS data out of the ADC provides some specified setup/hold time for the data around the clock, and usually at these sample rates there is not a lot of margin in the setup/hold time to be able to add external devices such as muxes that would eat in to the timing margin.  For the ADS58C48 that you mention there is a TI design on the TI web with an example FPGA interface  (http://www.ti.com/lit/ug/slaa545/slaa545.pdf   The ADC in that TI Design is the ADS4249, but that is essentially the same as the ADS59C48 except it is only 2 channels and is 14 bits.    For the ADS64xx serialized device, we do not have a similar TI Design available, but there have been a number of discussions on this forum about ways to handle the serialized data format, such as this posting a while back: https://e2e.ti.com/support/data_converters/high_speed_data_converters/f/68/p/281482/984207 

    Regards,

    Richard P.