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LM98714: LM98714 COMS mode no output

Part Number: LM98714

Hi

LM98714 CCD works well, how to set the VREF?

Attached configuration code and schematic for your reference.

setting.txt
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PIXCLK_frq = Inclk_frq;
DACCLK_frq = Inclk_frq*2;
#else
PIXCLK_frq = Inclk_frq/2;
DACCLK_frq = Inclk_frq; //��ģʽ�£�Inclk_frq > 5Mhz��
#endif
SH_PluseWide = (2*PIXCLK_frq/1000000-1)/2; //��С1.5us������ȡ2us���ң�
SH_DelayPointsNum = 1*PIXCLK_frq/1000000; //��С0.5ns������ȡ1us���ң�
LM98714_GPIO_Init();
LM98714_SelectPage(0x00);
LM98714_Write_Reg(0x00, 0x91); //MODE2-ͨ��GB-Ĭ��˳��-����One color (line) sequence
#ifdef Inclk_PIXCLK
LM98714_Write_Reg(0x01, 0x55); //BIAS CDS ADCCLK//���Ե�������λ�õ�--CDSģʽ����Ҫ���ݲ��ε���������INCLKΪPIXCLK// 7Mhz
#else
LM98714_Write_Reg(0x01, 0x58); //BIAS CDS ADCCLK//���Ե�������λ�õ�//��Ҫ���ݲ��ε���������INCLKΪDACCLK(�������5Mhz) 7Mhz
#endif
LM98714_Write_Reg(0x02, 0x20); //STANDY MODE
// LM98714_Write_Reg(0x03, 0x07); // CONFIG Main Configuration 3
LM98714_Write_Reg(0x04, 0x09); // CONFIG Main Configuration 4--LVDS
LM98714_Write_Reg(0x05, 0x00); // CONFIG Input Clamp Control-- ccd1711����Ӱ���򵥸�ͨ�����48����
LM98714_Write_Reg(0x06, 0x00); // CONFIG Auto CLPIN Position--�ݲ�����
// LM98714_Write_Reg(0x07, 0x1F); // Ĭ���ڲ�ǯλ
LM98714_Write_Reg(0x08, 0x01); // CONFIG Black Level Clamp Control--����������ģʽ����//SH���Զ���ʱ
LM98714_Write_Reg(0x09, 13+SH_DelayPointsNum); // CONFIG Auto Black Level Clamp Position--SH����ӳ�ʱ�Ӹ�����13�����ص�����
LM98714_Write_Reg(0x0D, 0x08); // CONFIG OSG CLAMP Control--׼ȷ��������λ��
LM98714_Write_Reg(0x0E, 0x08); // CONFIG OSB CLAMP Control
LM98714_Write_Reg(0x0F, 0x00); // CONFIG OSG SAMPLE Control
LM98714_Write_Reg(0x10, 0x00); // CONFIG OSB SAMPLE Control
// LM98714_SelectPage(0x01);
// LM98714_Write_Reg(0x01, 0x01); //Color2 PGA
// LM98714_Write_Reg(0x02, 0x01); //Color3 PGA
LM98714_SelectPage(0x02);
LM98714_Write_Reg(0x00, 0x40); //SH MASTER MODE
LM98714_Write_Reg(0x01, SH_PluseWide); //SH PLUSE WIDTH = 20us > 1.5US��
LM98714_Write_Reg(0x02, 0x80); //PIX1/2 Control--ʹ��--����--Ƶ��--SH���Ƿ���Ч
LM98714_Write_Reg(0x03, 0xC0); //PIX3/4
LM98714_Write_Reg(0x04, 0xC0); //PIX5/6
LM98714_Write_Reg(0x05, 0xC0); //PIX7/8
LM98714_Write_Reg(0x06, 0x00); //Line Clamp Enable--ѡ��Clamp��ʱ����ԴPIX1-8
LM98714_Write_Reg(0x07, 0x0E); //PIX1 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե������Ϊ��PIXCLKһ�£�
LM98714_Write_Reg(0x08, 0x1C); //PIX1 End
LM98714_Write_Reg(0x0A, 0x00); //PIX2 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե��
LM98714_Write_Reg(0x0B, 0x00); //PIX2 End
LM98714_Write_Reg(0x0D, 0x0E); //PIX3 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե��
LM98714_Write_Reg(0x0E, 0x1C); //PIX3 End
LM98714_Write_Reg(0x10, 0x00); //PIX4 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե��
LM98714_Write_Reg(0x11, 0x00); //PIX4 End
LM98714_Write_Reg(0x13, 0x0E); //PIX5 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե��
LM98714_Write_Reg(0x14, 0x13); //PIX5 End
LM98714_Write_Reg(0x16, 0x00); //PIX6 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե��
LM98714_Write_Reg(0x17, 0x00); //PIX6 End
LM98714_Write_Reg(0x19, 0x13); //PIX7 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե��
LM98714_Write_Reg(0x1A, 0x1C); //PIX7 End
LM98714_Write_Reg(0x1C, 0x00); //PIX8 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե��
LM98714_Write_Reg(0x1D, 0x00); //PIX8 End
LM98714_Write_Reg(0x1E, 0x00); //CMOS Data Mode Status Bit Enable--CLK5-10����״ָ̬ʾ
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Clip(07-14-16-41-19).rar

From the test we can see the output waveform in the self-test mode of LVDS.

But there is no output in the COMS mode.

Can you give some advice for this issue?

Thanks

Star

  • Hello Star,

    Thanks for your question. I've contacted the applications Engineer who supports this device.
  • Hello Star,

    In CDS mode both Reference level and Video level are present on OSx, CLAMP pulse is used to sample the reference level and SAMPLE pulse samples the Video level, the output code is reference level minus video level.
    In test mode only LVDS works, seems to me firmware does not reset register 4 to normal operation.

    Regards,
    Costin