Dear Technical Support Team,
I have some questions about DAC5689.
1.) Is it correct understanding about t_align below?
We use fclk2=672Mhz and t_align is 190ps based on datasheet.
So rising edge relationship between CLK1 and CLK2 should be over ±190ps, right?
CLK1=112MHz
CLK2=672MHz
2.)
Datasheet shows min value of t_align. How is the max value?
If clock generator adds large delay and then the same rising timing between CLK1 and CLK2, I guess that it is not good condition.
3.)
Does clock relationship between CLK1 and CLK2 has temperature variation inside DAC5689?
Current t_align is 400ps, then DAC output is good when temperature is 0℃.
But if temperature is 40℃, DAC output causes spurious on some frequency. then main tone appears on correct frequency.
Best Regards,
ttd
