• State Resolved
  • Locked Locked
  • Replies 6 replies
  • Subscribers 46 subscribers
  • Views 2977 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS131A04: Frame fault after enabling ADCs, DRDY not going low

Henry Hinton
Prodigy 40 points
Part Number: ADS131A04


Hi All,

I have already taken a look at this post. The issue I've been dealing with relates to after all registers have been configured (which occurs with no issue), the ADCs are woken up, and the device is locked.

Upon attempting to get converted data, The device only yields 0x222000 000000 000000 000000.

I am using asynchronous slave mode with an internal reference and the charge pump enabled. I expect the DRDY pin to go low periodically if I am querying it with NULL commands (even if data is being lost)--I am also implementing edge detection for DRDY but have not been able to get anything. Here is the output from my logic analyzer (I only have a 4 channel but assume that DRDY is constant throughout this image, as I have also tried to check for it).

Here is my schematic. The oscillator is running at 16.384MHz, and I currently have SCLK at 4MHz.

Do you think I might have damaged the IC in some way? F_FRAME (0x2501 IIRC) is only activated once the ADCs have turned on.

Thanks,

Henry

  • 0
    TI__Guru**** 181361 points
    Hi Henry,

    Damage is a possibility, is this a proper PCB or a hand made proto board? Can you send us the detail of your ADS131A04 configuration sequence, including a screen shot from your logic analyzer?
  • 0 in reply to Tom Hendrick
    Prodigy 40 points

    Hi Tom,

    This is on a PCB, as seen in the following image. I have checked the signal integrity at the device pins using a 500MHz scope and they seem okay with little to no ringing.

    Microcontroller breakout with ADS131A04 electrode breakout

    Here is my clock signal at the SCLK pin:

     

    SCL signal on scope trace

    Here is the output of my configuration sequence.

    S: 0x0011 = RESET
R: 0x0000 = NULL
S: 0x0011 = RESET
R: 0xFF04 = READY

S: 0x0655 = UNLOCKED
R: 0x0655 = UNLOCKED

Writing Register B with data 11101000
S: 0x4BE8 = WREG SENT
R: 0x2BE8 = RREG

Writing Register C with data 111100
S: 0x4C3C = WREG SENT
R: 0x2C3C = RREG

Writing Register D with data 10
S: 0x4D02 = WREG SENT
R: 0x2D02 = RREG

Writing Register E with data 100001
S: 0x4E21 = WREG SENT
R: 0x2E21 = RREG

Reading Register 0
S: 0x2000 = RREG
R: 0x2004 = RREG

Reading Register 1
S: 0x2100 = RREG
R: 0x2103 = RREG

Reading Register 2
S: 0x2200 = RREG
R: 0x2200 = RREG

Reading Register 3
S: 0x2300 = RREG
R: 0x2300 = RREG

Reading Register 4
S: 0x2400 = RREG
R: 0x2400 = RREG

Reading Register 5
S: 0x2500 = RREG
R: 0x2500 = RREG

Reading Register 6
S: 0x2600 = RREG
R: 0x2600 = RREG

Reading Register 7
S: 0x2700 = RREG
R: 0x2701 = RREG

Reading Register 8
S: 0x2800 = RREG
R: 0x2800 = RREG

Reading Register 9
S: 0x2900 = RREG
R: 0x2900 = RREG

Reading Register A
S: 0x2A00 = RREG
R: 0x2A00 = RREG

Reading Register B
S: 0x2B00 = RREG
R: 0x2BE8 = RREG

Reading Register C
S: 0x2C00 = RREG
R: 0x2C3C = RREG

Reading Register D
S: 0x2D00 = RREG
R: 0x2D02 = RREG

Reading Register E
S: 0x2E00 = RREG
R: 0x2E21 = RREG

Reading Register F
S: 0x2F00 = RREG
R: 0x2F00 = RREG

Reading Register 10
S: 0x3000 = RREG
R: 0x3000 = RREG

Reading Register 11
S: 0x3100 = RREG
R: 0x3100 = RREG

Reading Register 12
S: 0x3200 = RREG
R: 0x3200 = RREG

Reading Register 13
S: 0x3300 = RREG
R: 0x3300 = RREG

Reading Register 14
S: 0x3400 = RREG
R: 0x3400 = RREG

Writing Register F with data 1111
S: 0x4F0F = WREG SENT
R: 0x2F0F = RREG

S: 0x0033 = WAKING UP...
R: 0x0033 = WAKING UP...

    Here's two of these transactions on the logic analyzer:

    UNLOCK:

    REG B = E8 : VNCPEN=1, HRM=1, RESERVED, VREF_4V = 0 (2.44V ref), INT_REFEN=1, COMP_TH = 0

    Does the schematic seem okay? I've been working at this for a few days now and I'm stumped.

    Thanks for your patience!

    Henry

  • 0 in reply to Henry Hinton
    TI__Guru**** 181361 points
    Hi Henry,

    The schematic seems fine. What is that little 'runt' pulse on the MOSI line around the 9th rising SCLK edge in the second transfer?
  • 0 in reply to Tom Hendrick
    Prodigy 40 points

    Hi Tom,

    I'm not sure-potentially threshold noise with the logic analyzer? I can take another look with a scope but it looks like it happens intermittently between byte transfers from the Teensy 3.2 (I'm using the Arduino SPI library, and I've set it to use Mode 1). But it looks nevertheless that the registers are being set correctly, or at least to the values I have indicated. I did a test of my vref and noticed that, despite the internal generator being turned on, it only reached around 0.96 volts. Do you think this would indicate chip damage? And what would you recommend trying next?

    Thanks,

    Henry

  • 0 in reply to Henry Hinton
    TI__Guru**** 181361 points
    Hi Henry,

    Have you verified that the oscillator is working? I don't see anything wrong in the configuration. If you just 'wait' at the end of that routine, you should be getting DRDY toggling. Where are you measuring the reference voltage?
  • 0 in reply to Tom Hendrick
    Prodigy 40 points

    Hi Tom!

    I used a multimeter on the continuity test setting to see whether there were any shorts underneath the oscillator chip itself. The chip has four pins: two GND, and two I/O. Surprisingly, the GND terminals were not connected to each other, but the clock pins were! This was confusing; I had definitely laid out the footprint according to the datasheet, as seen below:

    Inline image 2

    I took out a fresh oscillator from the package of five. I was initially concerned that I had somehow damaged the first chip, but it was unlikely. As with the chip soldered to the board, I performed a continuity test and found that pins 1 and 3 were somehow shorted! After rotating the oscillator 90 degrees, I got the sinusoidal input I was providing to CH1 on the ADS131A04 at the expected amplitude. Turns out the datasheet and the component don't line up (I made sure the model number of the oscillator matched the documentation)-- this oscillator for some reason has pin 2 marked with the notched pad...

    I'm still getting a frame fault but DRDY is now toggling every frame :) I'm marking this as resolved since I'm not having any current issues with data aggregation.

    Thanks again for all your help! This has taken me a while to figure out since I unwittingly assumed the datasheets for my components were accurate. Oh well, I guess it's a good learning experience.