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ADS8866: A question about ADS8866

Part Number: ADS8866
Other Parts Discussed in Thread: ADS8864

We want to use A 16-bit ADC,now we are evaluating ADS8866, I want to ensure that  After the first byte sample is completed, can I restart the AD transform before the second byte sample ?

  • Received email directly from Leo Zhao, need more information to confirmation the concern, will communicate by email and  call.

    Best regards

    Dale Li

  • Hi Dale, thank you very much,I have received your answer, but I still have three question about the sentence "the first conversion data will be probably incorrect because acquisition time will probably not be enough which depends on the position of new conversion start". 1、If I restart the conversion, and wait time Over tACQ, so that can I guarantee the accuracy of therest conversion data;2、what is the value of the tACQ? 3、How can I determine theposition of new conversion start?
  • Leo:

    Dale is clarifying a couple of points.  

    On the rising edge of CONVST, SDO becomes inactive, and goes to high-impedance state.  Any data that has not been read at that time is lost.  SDO does not become active again until after the new conversion data is latched into the output data buffer.

    Also, after a conversion, care must be taken to allow sufficient acquisition time before initiating another conversion.  According to the ADS8866 datasheet (p.3), 1200ns is the minimum acquisition time.   Figure 40, on p. 16 of the datasheet shows a simplified diagram of the input circuit, where the CDAC is modeled as a single 55pF capacitor, and the on-resistance of the sampling switch is shown as a series 96-ohm resistor.  This RC structure is the main reason why the acquisition time is needed.  The input driver circuitry is another big factor as well, but that completely depends on each customer's implementation.  (We can help with recommendations for drive circuits if need be.)

    Acquisition time begins at the end of a conversion whether the data is clocked out or not.  If you need to know exactly when that happens, this device has a BUSY indicator option.

    When Dale and I were talking about your question, our concern about the accuracy of your second conversion came from the idea that you were going to trigger a conversion, then read out only part of the data before triggering a second one.  Digitally, this is not a problem; you can ignore the data if you want to.  However, if you do not have time to read all of the data, then you may not be leaving enough time for the analog input to settle.  We just wanted to be sure you were thinking of that.

    Let us know if this helps!

  • For a lot more information, you can look at TI's Precision Labs on ADC's.
    training.ti.com/ti-precision-labs-adcs

    --Bryan
  • Hi Bryan,
    We have a new question about ADS8866,About ADS8866 conversion time, the manual has been written in the 500 ns - 8800 ns between, would you please tell me why the conversion time interval is so big, is there any method can make the conversion time more accurate, in fact, I hope the interval of the conversion time is 8000 ns - 8800 ns, and we hope the conversion time is stable.
    I also saw that the conversion time of ADS8864 is 500ns-1200ns, but this chip is much more expensive. 3Q
  • The ADS8866 is a 100kSPS converter, meaning that the entire conversion cycle takes 10us. To operate the device at its maximum rate, the controller must start a conversion, wait for the maximum conversion time to ensure that the conversion is complete, then clock the data out with SClk up to 16MHz. Conversion takes up to 8.8us, and data transfer at 16MHz takes 1us. The data transfer is taking place during the Acquisition phase, which needs a minimum of 1.2us. So 8.8us + 1.2us = 10us for 100kSPS operation.

    Alternately, a BUSY indicator can be used to generate an interrupt signal to your controller when the conversion is complete. In that case, there is more flexibility as to when the controller can clock the data out, but it still would not be recommended to start a conversion more often than every 10us.

    As for the reason why the wide range of conversion times, I will need to do some research. However, it is recommended that the interface timing should be designed for the maximum conversion time of 8.8us.

    Thank you for your question! I will look into the question about the wide range for the conversion time specification.