We have interfaced LMP92018 with an FPGA , but unable to see any response, following are questions for which we require response immediately
1. How to check whether an LMP92018 is completed its power up sequence and ready for operation ? the hardware connections are proper, clock , mosi, cs are probed and hardware wise we see no problems
2. Below is the timing diagram we tapped on FPGA which is going to LMP92018, verify it and let us know what is wrong with the timing sequence, we strictly followed timing diagram available in data sheet
in the above image, you can clearly see the SPI_CLK_top showing the clock, CS being high for every transaction, MOSI is been written with valid data commands,
we see no data recieved or available on MISO line
data_uart is the 24bit input data, O_rxData is response in binary format
a zoomed view is below for a single frame
Kindly revert with appropriate test approch for solving this problem
Regards
Shyam Daram
