Team,
I have a customer designing with DAC60096, and they've run into a discrepancy regarding the VREH/VREFL and AVSS/AVDD pins. Please see questions below:
- Data sheet states 100nF cap should be used on page 5, but on the EVM 150nF are used. Can we simply use 8x100nF for VREFH and 8x100nF for VREFL?
- On the EVM schematics, two pins each are connected to a separate cap. Can I simply form four “planes” (2 for VREFH, 2 for VREFL). Looking into the pin arrangement on pg. 3, and layout recommendation on pg. 42), we see no reason for the connection demonstrated via the EVM. Any comment here?
- The 100nF / 220nF ambiguity also exists on the AVSS, AVCC, and DVDD pins vs. recommendation on the data sheet (pg. 4 Vs pg. 42). Could you clarify here?