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DAC60096: Capacitance Discrepancy Between DS and EVM

Part Number: DAC60096

Team,

I have a customer designing with DAC60096, and they've run into a discrepancy regarding the VREH/VREFL and AVSS/AVDD pins. Please see questions below:

  1. Data sheet states 100nF cap should be used on page 5, but on the EVM 150nF are used. Can we simply use 8x100nF for VREFH and 8x100nF for VREFL?
  1. On the EVM schematics, two pins each are connected to a separate cap. Can I simply form four “planes” (2 for VREFH, 2 for VREFL). Looking into the pin arrangement on pg. 3, and layout recommendation on pg. 42), we see no reason for the connection demonstrated via the EVM. Any comment here?
  1. The 100nF / 220nF ambiguity also exists on the AVSS, AVCC, and DVDD pins vs. recommendation on the data sheet (pg. 4 Vs pg. 42). Could you clarify here?

  • Carolus,

    The Engineer who designed the EVM is no longer with our DAC organization. Please give us some time to double-check the reasoning behind both the datasheet and EVM documentation.
  • Hi Carolus,

    In general, we recommend 1 capacitor per pin, but realistically it is very difficult to do in on this package. It is for this reason we have consolidated some adjacent pins and connected them to just one cap. For this same reason we increased the capacitor sizes. That being said the exact value is less important, and I doubt you could see any discernible difference in performance between a 100nF and 150nF, but capacitors on that same order of magnitude is recommended. I would avoid doing a smaller capacitor than the 100nF.

    The layout example in the datasheet shows a good balance of consolidating components, a 'clean' layout, and performance.

    Thanks!
    Paul