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TX517: Disallowed Logic States and Example Input Data Set of a 17-level Output

Hiroshi Katsunaga
Mastermind 6480 points
Part Number: TX517

Hello,

My customer have some questions about TX517.

[Q1]

"Disallowed logic states" is listed in Table 2 in the D/S.

I agree that the "disallowed mode 1" and the "disallowed mode 2" are not allowed because these are a short-thru fault condition.

"Example input data set of a 17-level output" is listed in Table 3 in the D/S.

There are some disallowed logic states in this table.

For example, I think that "output level 6" corresponds to "Disallowed mode 2" because INP0B and INN0B are ON.

How do I interpret this?

Can I think that INP0x and INN0x will allow "short-thru" fault condition ?

[Q2]

TX517 can generate 5-level output for single-ended.

Is my understanding correct ?

<My understanding>

output level 2 : INP1x=ON, INN1x=OFF, INP2x=OFF, INN2x=OFF, INP0x=OFF, INN0x=OFF

output level 1 : INP1x=OFF, INN1x=OFF, INP2x=ON, INN2x=OFF, INP0x=OFF, INN0x=OFF

output level 0 : INP1x=OFF, INN1x=OFF, INP2x=OFF, INN2x=OFF, INP0x=ON, INN0x=ON

output level -1 : INP1x=OFF, INN1x=OFF, INP2x=OFF, INN2x=ON, INP0x=OFF, INN0x=OFF

output level -2 : INP1x=OFF, INN1x=ON, INP2x=OFF, INN2x=OFF, INP0x=OFF, INN0x=OFF

[Q3]

They seems to want fast rise/fall time.

Therefore they are considering whether it can be used as follows.

<case 1>

HV1=40V, HV2=40V, HV0=5V

LV1=0V, LV2=0V, LV0=0V

Is this configuration possible ?

<case 2>

HV1=40V, HV2=40V, HV0=5V

LV1=-30V, LV2=-20V, LV0=-5V

Is this configuration possible ? 

[Q4]

They are considering whether to be Single-ended or Differential.

Is my understanding correct ?

<My understanding>

Differential has the following advantages compared to Single-ended.

　1. Higher output voltage

　2. up to 17 levels output (Single-ended is up to 5 levels output)

   3. Better common-mode noise

Differential has the following disadvantages compared to Single-ended.

　1. Require many power supply voltage

　2. Only 1 output

Are there other advantage / disadvantage ?

Best Regards,

Hiroshi Katsunaga

  • 0
    TI__Genius 12025 points
    Hi Hiroshi-san,

    How are you?
    Thank you for helping the customer using TX517 device.
    We will look into these customer questions
    and will reply very soon.

    Thank you again!
    Have a nice day!

    Best regards,
    Chen
  • 0 in reply to Chen Kung
    TI__Genius 12025 points

    TX517_User_Guide_slou317b.pdf

    Hi Hiroshi-san,

    How are you?

    Please allow us answer a couple questions

    also we will continue to answer other more questions.

    Thank you!

    Just let you know.

    1) OUTA (Channel A) and OUTB (Channel B) are two individual output pins.

        TX517 can run (output) only one output channel without the other channel.

        So TX517 has two output channels and their circuits are separated.

        Therefore, using the transformer between OUTA and OUTB,

         that just is an optional choice.

    2) When running one channel, each channel can output up to 5 levels.

    3) When we try to use the subtraction method from one channel output

       to the other channel output

       (such as OUTA-OUTB), we could obtain Higher output voltage

       and also we can create up to 17 levels.

       (Please take a look at the attached TX517 User's Guide.)

    4) Using a transformer to perform OUTA-OUTB is

       one way to show the voltage difference between Channel A output

       and Channel B output.

       We can also just use two scope probes on the oscilloscope

        to measure the voltage difference (such as OUTA-OUTB) as well.

    5) In the datasheet,

        "Single Ended: 5 Levels" means when only using

         either OUTA output or OUTB output separately.

        "Differential: 17 Levels" means when connecting both

         OUTA output and OUTB output at the same time.

         Output Voltage can be up to 200Vpp (in Differential Mode).

    6) the User's Guide shows the case is:

        when OUTA has 5-level voltage output

        and OUTB has 5-level voltage output.

        It shows what is the Input Pattern settings:

    a) for 5 level (Input pattern settings):

        Note: this setting is not the same as the customer's [Q2].

    b) 5 level (Output Waveform for OUTA=Single-ended and OUTB=single-ended and Differential=OUTA-OUTB):

    Thank you very much!

    Have a nice weekend!

    Best regards,

    Chen

  • 0 in reply to Chen Kung
    TI__Genius 12025 points

    Hi Hiroshi-san,

    How are you?

    We double checked the customer's question [Q2] with our TX517 EVM user's guild.

    Customer creates TX517 INxxA input pattern settings to generate the 5-level outputs.

    That is correct.

    And that is the same as our TX517 User's Guide 5-level mode settings.

    Please take a look below:

    1) This shows our INxxA Input Pattern (for 5-level) settings:

    Please notice: the P input signals needed to be inverted due to P-FET inside TX517.

    2)The following shows the Output Waveform (for 5-level) settings:

    Please take a look.

    Thank you very much!

    Best regards,

    Chen

  • 0 in reply to Chen Kung
    Mastermind 6480 points
    Hi Chen-san,

    Thank you for your confirmation for [Q2].

    For [Q1],
    I understood that INP0x and INN0x will allow "short-thru" fault condition from the answer of [Q2].

    How about [Q3] ?

    Best Regards,
    Hiroshi Katsunaga
  • 0 in reply to Hiroshi Katsunaga
    TI__Genius 12025 points

    Hi Hiroshi-san,

    How are you?

    Thank you very much for helping the TX517 for the customer.

    Yes, for customer's [Q1] question:

    If when both INP0x=ON and INN0x=ON are allowed "short-thru" fault condition at the same time, 

    both HV0x and LV0x outputs must please follow the below:

    HV0x <= 1.9V and LV0x >= -1.9V

    For the customer's [Q3] question:

    from: <case 1>

    HV1=40V, HV2=40V, HV0=5V

    LV1=0V, LV2=0V, LV0=0V

    Answer are:

    HV1 must >= HV2 and if HV1=HV2, both HV1 and HV2 must be exactly the same.

    LV1 must <= LV2 and if LV1=LV2, both LV1 and LV2 must be exactly the same.

    HV0=5V is not ok, because HV0 must <= 1.9V

    LV0=0V is OK, because LV0 >= -1.9V

    from: <case 2>

    HV1=40V, HV2=40V, HV0=5V

    LV1=-30V, LV2=-20V, LV0=-5V

    Answer are:

    HV1 must >= HV2 and if HV1=HV2, both HV1 and HV2 must be exactly the same.

    LV1 is <= LV2, so they are ok.

    HV0=5V is not ok, because HV0 must <= 1.9V

    LV0=-5V is not ok, because LV0 must >= -1.9V

    Thank you very much!

    Have a nice day!

    Best regards,

    Chen

  • 0 in reply to Chen Kung
    Mastermind 6480 points

    Hi Chen-san,

    Thank you for your fast response.

    But I can not understand the following item.

    * HV0x <= 1.9V and LV0x >= -1.9V

    Below is recommended operating conditions in the D/S.

    1.9V@HV0x and -1.9V@LV0x are typical value.

    Why are HV0x=5V and LV0x=-5V not accepted ?

    Best Regards,

    Hiroshi Katsunaga

  • 0 in reply to Hiroshi Katsunaga
    TI__Genius 12025 points

    Hi Hiroshi-san,

    How are you?

    Yes, for TX517 device

    This condition: HV0x <= 1.9V and LV0x >= -1.9V will be needed,

     when set INP0x=ON and INN0x=ON at the same time.

    ----------------------

    If when set INP0x=ON and INN0x=OFF at the same time

    or If when set INP0x=OFF and INN0x=ON at the same time

    or If when set INP0x=OFF and INN0x=OFF at the same time,

    then HV0x=5V and LV0x=-5V are acceptable.

    from the TX517 data sheet:

    ----------------------

    Because on the TX517 data sheet, in general,

    both INPxx and INNxx pins are not suggested (=disallowed) to be ON at the same time.

    Please take a look:

    Thank you very much!

    Best regards,

    Chen

  • 0 in reply to Chen Kung
    Mastermind 6480 points
    Hi Chen-san,

    Thank you for your clear comments.
    OK, I understood it.

    Thank you for your cooperation.

    Best Regards,
    Hiroshi Katsunaga
  • 0 in reply to Hiroshi Katsunaga
    Mastermind 6480 points
    Hi Chen-san,

    I'm sorry, we can not understand the answers of [Q3].
    I asked some question to Xiaochen-san, but I am asking the following question here, because it is the continuation of this post.

    Neither <Case A> nor <Case B> has the state of INP0x=ON and INN0x=ON.
    Why is a condition of "HV0x <= 1.9V and LV0x >= -1.9V" required ?

    Best Regards,
    Hiroshi Katsunaga
  • 0 in reply to Hiroshi Katsunaga
    TI__Genius 12025 points

    Hi Hiroshi-san,

    How are you?

    It's sorry for missing the detail description of conditions (as below):

    When the condition of HV0x <= 1.9V and LV0x >= -1.9V required,

    this is only based on INP0x=ON and INN0x=ON at the same time.

    Because <case 1> and <case 2> are not based on the above situation,

    therefore they are not required by: HV0x <= 1.9V and LV0x >= -1.9V.

    Here are more completed answers

    for <case 1> and <case 2>:

    Thank you very much!

    Have a nice day!

    Best regards,

    Chen

  • 0 in reply to Chen Kung
    Mastermind 6480 points
    Hi Chen-san,

    Thank you for your fast response.
    OK, I understood it.

    Thank you for your cooperation.

    Best Regards,
    Hiroshi Katsunaga