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ADC12J2700: CAL_STAT bit 2 toggling

Part Number: ADC12J2700

We are seeing bit 2 in the CAL_STAT register (0x5b) toggle occasionally if we poll that register repeatedly. We're operating with background calibration enabled, and generally read a value of 0x09 from the register, but 30-50% of the time we instead read back 0x0d.

Questions:

- Is this expected behavior?

- What is the reason for the bit toggling?

We noticed this while debugging unit-to-unit variations in ADC noise floor. With the input terminated at the ADC inputs, we're seeing a 4-5 dB variation in noise floor levels on different boards.  We're trying to understand if this bit toggling is indicating any sort of issue with the calibration process that could lead to unit-to-unit variation in performance.

  • Hi Ryan
    When background calibration is running the CAL_CONT_OFF bit will briefly toggle high as the cores finish calibration and swap (while CAL_CONT=1). You only need to check the status of CAL_CONT_OFF when you are stopping the background calibration process by setting CAL_CONT=0, otherwise you can ignore it. The fact it is changing does not indicate any problem with calibration that would affect performance.
    Can you share any FFTs or raw data files to show the different results between boards?
    Best regards,
    Jim B
  • Hi Jim - 

    With regard to the bit toggling, I'm not seeing the CAL_CONT_OFF bit toggling, but the reserved bit next to CAL_CONT_OFF (bit 2). Does the fact that bit 2 is going high indicate any issue that we should be paying attention to?

    Thanks - 

         -Ryan

  • Hi Ryan
    That reserved bit (address 0x05Bh, bit 2) toggling high is a good thing. It is an internal diagnostic the designers included and I can't share the exact details of the functionality, but it is expected to go high periodically during background calibration.
    Best regards,
    Jim B