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ADS8568: Data not received. Parallel interface mode & hardware mode selected

Part Number: ADS8568

I have configured the ADC in PAR mode and HW mode. Both pins are connected to DGND. When I am giving CONVST signal, I receive a BUSY pulse from high to low (checked on DSO). My CS is always low. After BUSY goes high to low, I create 8 RD pulses as per the timing diagram but don't receive any data. I also probed on DB0-DB16 pins and checked but no pulses were received. Input voltage was set at 4.8V. Internal reference selected with range set to +-2.5V. I even gave only 1 RD pulse from high to low and checked A0 data but still the same.

If someone can suggest any solution or tips.

Regards,

  • Do not mount components: R104, R105, R108, R109, R110. Processor used is DsPIC 33.

  • Hi Bhavin,

    Can you please upload the timing plot for CONVST,BUSY,/CS and /RD? Also, please upload a clear schematic because it is hard to see now. Thanks.

    Regards

    Dale

  • Hi Dale,

    As per your request,I'm attaching the screenshots of CRO with required waveforms.Since we could not probe all the 4 signals at one time, we have parted it into two parts. In first image, we have captured CONVST, CS_BAR and RD_BAR. In Second image,we have captured CONVST, BUSY and RD_BAR 

    Also attaching the schematic of ADC in PDF and the snippet of the code which is used for sampilng the data (Its an FSM based model)

    void ADC_conv(void)
    {
    	j=0;
    	while(j<5)
    	{	
    		switch(ADC_ST)
    		{
    			case(ADC_init):	
    				ADC_RST = 1;
                    delayus(1);
                    ADC_RST = 0;
                    ADC_CS_ = 1;
                    ADC_RD_ = 1;
    				ADC_CONVST = 0;		// set CONVST, command ADC to start conversion
    				j++;
    				ADC_ST = ADC_convst;
    				break;
    				
    			case(ADC_convst):				
    				ADC_CONVST = 1;		// set CONVST, command ADC to start conversion
                    delayus(2);
                    while(ADC_BUSY == 1);	// wait till busy is high
                    if(ADC_BUSY == 0){
                        ADC_CONVST = 0;         // Remove conversion signal
                        j++;
                        ADC_ST = ADC_FS;
                        break;
                    }
    			case (ADC_FS):
    				ADC_CS_ = 0;    		//chip select
    				j++;
                    delayus(2);
                    ADC_RD_=0;
                    delayus(1);
    				ADC_ST = ADC_sampledata;
    				break;
    							
    			case(ADC_sampledata):
    
                        ADC_RD_ = 0;
                        AI[1] = ADC_DATA;
    
    				j++;
    				ADC_ST = ADC_complete;
    				break;
    								
    			case(ADC_complete):
    //				  		//de-sync frame (chip select)
    				j++;
    				ADC_ST = ADC_init;
    				break;
    		}
    	}	
    }

      ADC_SCHEME.pdf

  • Hi Bhavin,

    I will look into the detail and get back to you soon, thanks.

    Regards,

    Dale

  • Hi Bhavin,

    Your BUSY is correct which means the ADC conversion is working. I will send you an example code for ADS8568 offline.

    Can you please confirm pin 11 is actually connected to DGND or +3.3V? can you confirm if your 53,60 Pins are connected to AGND on pcb?  Also check the voltage on REFIO pin. Looks like you are sending one /RD with a /CS to ADC, but I'm not sure what happened on /CS from high to low, I would suggest you to add a delay between /CS and /RD signal, also a delay(tCSCV) between /RD&/CS and next CONVST rising edge. A whole frame timing like the Figure 2 in datasheet will be very helpful to address the issue. Thanks.

    I apologized for late feedback.

    Regards,

    Dale

  • Hi Dale,
    Our problem is resolved. The Error was in the initiation of the micro-controller port on which we are reading the ADC's paralled data.
    Your code helped us a lot in making our code more perfect and robust. Thank you so much for your support.

  • Hi Bhavin,

    Thank you for update, please let me know if you need any further support.

    Regards,

    Dale